LDPC Codeword Puncturing for Flexible Code Rate Adaptation
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Solution Overview
Problem
Existing devices implementing variable code rate error correction coding, such as LDPC, face challenges in adding additional code rates without modifying existing parity check and generator matrices, which can introduce suboptimal results like short cycles.
Innovation Solution
The system achieves additional code rates by puncturing a certain number of data and redundancy bits from existing codewords, allowing for adjustable puncturing locations and patterns to adapt to different wireless or wire environments, without modifying the LDPC encoder or matrices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If additional parity check and generator matrices are stored on the device to add code rates, then code rate versatility is improved, but device complexity and memory requirements increase
Solution Approach 1:
The patent applies universality by enabling a single parity check matrix to serve multiple code rates through puncturing. The base matrix is designed to support the lowest code rate, and by selectively puncturing (removing) specific columns corresponding to data or parity bits, the same matrix generates codewords for higher code rates. This eliminates the need to store separate matrices for each code rate, reducing device complexity while maintaining code rate versatility.
Solution Approach 2:
The patent changes the effective parameters of the coding system by applying puncturing patterns to the base codeword. By removing specific bits (changing the transmission length and redundancy ratio), the system derives multiple code rates from a single matrix. This parameter-based approach allows flexible code rate adaptation without modifying or multiplying the underlying parity check matrix structure.
2Adaptability or versatility
If existing parity check and generator matrices are modified by removing rows or columns to add code rates, then code rate versatility is improved, but coding performance deteriorates due to short cycles
Solution Approach 1:
The patent applies preliminary action by pre-designing the base parity check matrix with specific column structures that are optimized for the lowest code rate. The matrix is constructed beforehand with the knowledge that certain columns will be punctured for higher code rates. This preliminary design ensures that the remaining columns after puncturing do not create harmful short cycles, thereby maintaining coding performance across all derived code rates without requiring modification of the matrix structure.
3Adaptability or versatility
If codeword puncturing is applied to achieve higher code rates, then code rate flexibility is improved, but the number of transmitted bits increases requiring selective bit removal
Solution Approach 1:
The patent applies the extraction principle through puncturing, where specific bits (columns) are selectively removed from the base codeword to achieve higher code rates. The puncturing pattern strategically removes either data bits or parity bits based on the desired code rate and performance requirements. This extraction process reduces the transmitted bit quantity while maintaining the essential error correction capability, enabling flexible code rate adaptation from a single base matrix.
Data Source
AI summary
A system of codeword puncturing for varying code rates may include at least one transmitter circuit. The at least one transmitter circuit may be configured to perform error correction coding to generate codewords at a first code rate. The at least one transmitter circuit may be further configured to puncture a number of bits from a location within each of the codewords to implement a second code rate that is greater than the first code rate. The at least one transmitter circuit may be further configured to provide the punctured codewords for transmission. The device may further include at least one receiver circuit that may be configured to receive bit sequences comprising received punctured codewords. The at least one receiver circuit may be further configured to insert bits into the bit sequences to compensate for the puncturing and perform error correction decoding on the bit sequences including the inserted bits.


