LDPC Codeword Conversion Using Sub-Circulant Parallel Encoding

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Solution Overview

Problem

Existing data decoding circuits face performance insufficiencies due to limited available power and die space, making it challenging to improve their performance effectively.

Innovation Solution

The implementation of a data encoding system that includes a data encoder circuit and a codeword conversion circuit, which applies an encoding algorithm to create a hardware flexible codeword divisible into multiple sub-circulants, allowing for parallel processing and reducing hardware complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If more circuitry is used to improve data decoding circuit performance, then performance increases, but power consumption and die space increase

Engineering Contradiction:
Improvedata decoding circuit performanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The codeword is divided into multiple sub-circulants, allowing the decoding circuit to process data in parallel segments. This segmentation enables the use of simpler, lower-power circuitry that processes divided data units simultaneously, achieving high performance without proportionally increasing power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transforms the decoding problem from a single-dimensional sequential process into a multi-dimensional parallel structure by organizing data into sub-circulants that can be processed along multiple dimensions simultaneously, reducing the computational burden on individual circuit elements and thereby reducing power requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If more circuitry is used to improve data decoding circuit performance, then performance increases, but die space increases

Engineering Contradiction:
Improvedata decoding circuit performanceVSAvoiddie space
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

By segmenting the codeword into sub-circulants, the patent enables multiple decoding operations to be performed in parallel using compact circuit units. This approach achieves high performance with smaller individual circuit blocks, reducing total die space compared to a single large-scale decoder.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent combines multiple sub-circulants into a unified decoding framework that shares common computational resources and control logic. This merging allows parallel processing capabilities to be achieved without proportionally increasing die space, as shared infrastructure reduces redundant circuitry.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If traditional encoding algorithms are used, then implementation is simpler, but hardware flexibility and parallel processing capability are reduced

Engineering Contradiction:
Improveimplementation simplicityVSAvoidhardware flexibility
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent introduces dynamic reconfigurability into the encoding system, allowing the hardware to adapt its processing structure based on the specific codeword being processed. The codeword conversion circuit dynamically reorganizes data into sub-circulants, providing flexibility while maintaining a relatively simple base implementation through systematic transformation rules.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the structural parameters of the codeword representation from a traditional format to a sub-circulant-based format. This parameter transformation enables parallel processing and hardware flexibility while building upon standard encoding algorithms, thus maintaining implementation simplicity while enhancing adaptability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8775898B2Systems and methods for hardware flexible low density parity check conversion
Publication Date: 2014.07.08 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8775898B2 patent drawing
  • US8775898B2 patent drawing
  • US8775898B2 patent drawing

AI summary

The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for data encoding.