LDPC Parity Check Column Layout for High-Rate Puncturing

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Solution Overview

Problem

Existing LDPC codes face performance degradation at high code rates due to puncturing, which affects the reliability and efficiency of channel transmission in communication systems.

Innovation Solution

The proposed solution involves modifying the LDPC code structure by permuting and puncturing specific columns in the parity check matrix to optimize code rate performance, specifically by adjusting the positions of parity check columns to minimize the number of entries punctured, thereby enhancing the decoding efficiency at high code rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If puncturing is applied to achieve high code rates, then code rate is improved, but decoding performance deteriorates

Engineering Contradiction:
Improvecode rateVSAvoiddecoding performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by differentiating the treatment of different column types in the parity check matrix. Information columns are punctured to achieve high code rates, while parity check columns are preserved and optimized through permutation to maintain decoding performance. This selective, location-specific approach allows simultaneous achievement of high code rate and good decoding performance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent performs preliminary permutation of the parity check matrix columns before encoding and puncturing. By pre-optimizing the positions of parity check columns and arranging them in a specific order, the system prepares the matrix structure in advance to minimize performance degradation from subsequent puncturing operations, enabling high code rates while maintaining decoding capability.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If puncturing is applied to increase code rate, then code rate is improved, but the number of punctured entries increases

Engineering Contradiction:
Improvecode rateVSAvoidnumber of punctured entries
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The patent applies local quality by differentiating the treatment of different column types in the parity check matrix. Information columns are punctured to achieve high code rates, while parity check columns are preserved and optimized through permutation to maintain decoding performance. This selective, location-specific approach allows simultaneous achievement of high code rate and good decoding performance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent selectively discards (punctures) only the information columns while preserving the parity check columns. This selective discarding approach minimizes information loss by removing only the redundant information bits necessary to achieve the target code rate, while retaining the essential parity check structure needed for decoding.

Inventive Principle:
Principle #34Discarding and recovering

3Ease of manufacture

If conventional LDPC matrix structure is used, then implementation is simple, but performance at high code rates is poor

Engineering Contradiction:
Improveimplementation simplicityVSAvoidperformance at high code rates
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent performs preliminary permutation of the parity check matrix columns before encoding and puncturing. By pre-optimizing the positions of parity check columns and arranging them in a specific order, the system prepares the matrix structure in advance to minimize performance degradation from subsequent puncturing operations, enabling high code rates while maintaining decoding capability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies local quality by differentiating the treatment of different column types in the parity check matrix. Information columns are punctured to achieve high code rates, while parity check columns are preserved and optimized through permutation to maintain decoding performance. This selective, location-specific approach allows simultaneous achievement of high code rate and good decoding performance.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP3641172B1Information processing method and communication apparatus
Publication Date: 2022.06.08 HUAWEI TECH CO LTD
  • EP3641172B1 patent drawingFigure 1
  • EP3641172B1 patent drawingFigure 2
  • EP3641172B1 patent drawingFigure 3A

AI summary

This application discloses an information processing method and apparatus, a communications device, and a communications system. The method includes: encoding an input sequence by using a low-density parity-check LDPC matrix, to obtain a bit sequence D, where a base matrix of the LDPC matrix is represented as a matrix of m rows and n columns, each column corresponds to a group of Z consecutive bits in the bit sequence D, and n and Z are both integers greater than 0; and obtaining an output bit sequence based on a bit sequence V, where the bit sequence V is obtained by permuting two groups of bits corresponding to at least two parity check columns in the bit sequence D. According to the information processing method and apparatus, the communications device, and the communications system in this application, a performance requirement on an LDPC code at a high code rate can be supported.