Sliding-Window LDPC-CTC Decoding With Adaptive LLR Memory Depth
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Solution Overview
Problem
Low-density parity-check convolutional codes (LDPC-CCs) face challenges in decoding due to high latency and poor performance with existing decoding methods, particularly with serial and parallel layered decoding, which are unsuitable for windowed decoding schemes and result in conflicts with memory management.
Innovation Solution
A 'sliding-window' decoding procedure is introduced, based on a simplified belief propagation algorithm, where the decoder manages IN-OUT memories by updating and dropping log likelihood ratios (LLRs) dynamically, allowing for adaptable latency and memory usage without requiring changes to the encoding matrix, enabling low latency and reduced memory requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If parallel layered decoding is used to decode different information sequences, then decoding performance and convergence speed are improved, but decoding latency increases
Solution Approach 1:
The patent applies dynamics by making the decoding approach adaptive rather than fixed. The system dynamically switches between parallel layered decoding (for different information sequences) and serial layered decoding (for the same information sequence) based on real-time performance requirements. This allows the decoder to optimize between speed and accuracy by adjusting the decoding strategy on-the-fly, resolving the contradiction between decoding performance and latency.
2Loss of time
If parallel layered decoding is used to decode the same information sequence, then decoding latency is reduced, but decoding performance deteriorates
Solution Approach 1:
The system dynamically selects the appropriate decoding mode based on performance requirements. When low latency is prioritized, parallel layered decoding on the same sequence is used. When high performance is prioritized, the system switches to parallel layered decoding on different sequences or serial layered decoding. This dynamic adaptation resolves the contradiction between latency and performance.
3Loss of time
If windowed decoding scheme is applied to LDPC-CC, then decoding latency is reduced, but memory management conflicts arise
Solution Approach 1:
The patent applies segmentation by dividing the decoding process into fixed-size windows that process fixed numbers of rows. This segmentation creates well-defined memory access patterns where data is read and written in predictable blocks, eliminating memory management conflicts. The windowed approach segments both the computational workload and the memory access patterns, making the system compatible with LDPC-CC structures.
Solution Approach 2:
The system changes the parameter of window size to control the balance between latency and memory usage. By adjusting the window size parameter, the decoder can optimize performance for different latency requirements while maintaining consistent memory management behavior. This parameter adjustment allows flexible adaptation without changing the fundamental memory management approach.
4Reliability
If the number of LLRs kept in memory is increased, then decoding performance is improved, but memory requirements increase
Solution Approach 1:
The system uses parameter changes by adjusting the window size to control the number of LLRs kept in memory. Larger window sizes retain more LLRs in memory for improved performance, while smaller window sizes reduce memory usage at the cost of performance. This parameter-based control allows flexible optimization of the trade-off between memory resources and decoding performance without requiring structural changes to the memory system.
Data Source
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AI summary
Provided is a procedure for decoding low-density parity-check convolutional turbo codes, LDPC-CTC, the LDPC-CTC being constructed from parallel LDPC-CC. The decoding procedure based on slots or windows (sliding window decoding) involves determining, based on a received signal, statistical values, e.g. LLRs, corresponding to information and parity bits of an encoded information bit sequence. If a number of determined statistical values equals or exceeds a threshold, a new decoding iteration is started, wherein a decoding iteration includes updating the determined statistical values based on actual determined statistical values and statistical values from a previous decoding iteration stored in a memory of the decoder. A stored statistical value stored in the memory is replaced with an updated statistical value, wherein the updated statistical value is kept in the memory for a number of succeeding decoding iterations. The information bits to which the updated stored statistical values correspond are decoded. If the latency/memory requirements are to be adpated according to circumstances/transmission requirement, the decoder can modify the memory depth.