LDPC Decoder Convergence Using Auxiliary Check Equations
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Solution Overview
Problem
Existing iterative decoding methods for Low Density Parity Check (LDPC) codes require extensive circuitry and high power consumption to evaluate all check equations, leading to increased latency and reduced throughput.
Innovation Solution
The proposed solution involves deriving a smaller set of auxiliary equations from the check equations, which are used to determine convergence, allowing for efficient decoding by evaluating these auxiliary equations instead of the original check equations, thereby reducing circuitry area and power consumption while maintaining fast convergence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all check equations are evaluated in iterative decoding, then decoding accuracy is improved, but circuitry area and power consumption increase
Solution Approach 1:
The patent extracts and evaluates only a selected subset of check equations rather than all check equations. The termination indication is computed based on a portion of the check equations, allowing the decoder to determine convergence without processing the entire set of check equations, thus reducing circuitry area while maintaining decoding accuracy.
Solution Approach 2:
The patent applies partial action by evaluating only the necessary portion of check equations required to determine decoding convergence. The termination indication is computed from a subset of check equations, which is sufficient to detect convergence conditions without requiring complete evaluation of all check equations.
2Reliability
If all check equations are evaluated in iterative decoding, then decoding accuracy is improved, but power consumption increases
Solution Approach 1:
The patent extracts and evaluates only a selected subset of check equations rather than all check equations. The termination indication is computed based on a portion of the check equations, allowing the decoder to determine convergence without processing the entire set of check equations, thus reducing power consumption while maintaining decoding accuracy.
Solution Approach 2:
The patent applies partial action by evaluating only the necessary portion of check equations required to determine decoding convergence. The termination indication is computed from a subset of check equations, which is sufficient to detect convergence conditions without requiring complete evaluation of all check equations, thereby reducing power consumption.
3Reliability
If all check equations are evaluated in iterative decoding, then decoding reliability is improved, but decoding latency increases
Solution Approach 1:
The patent extracts and evaluates only a selected subset of check equations rather than all check equations. The termination indication is computed based on a portion of the check equations, allowing the decoder to determine convergence without processing the entire set of check equations, thus reducing decoding latency while maintaining reliability.
Solution Approach 2:
The patent applies partial action by evaluating only the necessary portion of check equations required to determine decoding convergence. The termination indication is computed from a subset of check equations, which is sufficient to detect convergence conditions without requiring complete evaluation of all check equations, thereby reducing decoding latency.
4Reliability
If all check equations are evaluated in iterative decoding, then decoding reliability is improved, but throughput decreases
Solution Approach 1:
The patent extracts and evaluates only a selected subset of check equations rather than all check equations. The termination indication is computed based on a portion of the check equations, allowing the decoder to determine convergence without processing the entire set of check equations, thus increasing throughput while maintaining decoding reliability.
Solution Approach 2:
The patent applies partial action by evaluating only the necessary portion of check equations required to determine decoding convergence. The termination indication is computed from a subset of check equations, which is sufficient to detect convergence conditions without requiring complete evaluation of all check equations, thereby increasing throughput.
Data Source
AI summary
A decoder includes one or more Variable-Node Processors (VNPs) that hold respective variables, and logic circuitry. The logic circuitry is configured to decode a code word of an Error Correction Code (ECC), which is representable by a set of check equations, by performing a sequence of iterations such that each iteration involves processing of at least some of the variables, to hold one or more auxiliary equations derived from the check equations, so that a number of the auxiliary equations is smaller than a number of the check equations, to evaluate the auxiliary equations, during the sequence of iterations, using the variables, and, in response to detecting that the variables satisfy the auxiliary equations, to terminate the sequence of iterations and output the variables as the decoded code word.