LDPC Decoder Check-Node Processing for Lower Complexity
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Solution Overview
Problem
In flash memory systems using low density parity check (LDPC) codes, existing decoders face challenges in maintaining error correction performance while minimizing computational complexity, particularly in counting the number of messages with specific reliability and determining the magnitude of check-to-variable messages efficiently.
Innovation Solution
A method is introduced that involves a decoder with variable nodes and check nodes, where the check nodes receive variable-to-check messages, count messages of specific magnitude, and determine the magnitude of check-to-variable messages based on the count value and the magnitude of variable-to-check messages, thereby reducing computational complexity and enhancing error correction performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the check node uses min-sum algorithm to determine the magnitude of C2V message by calculating min1, min2, and min1_index, then the error correction performance is maintained, but the computational complexity increases
Solution Approach 1:
The patent changes the parameter representation from full precision LLR values to a simplified format using only a magnitude bit and a sign bit. This parameter reduction maintains the essential information needed for error correction while dramatically reducing the computational complexity of the min-sum algorithm operations.
Solution Approach 2:
The patent extracts only the critical components (magnitude bit and sign bit) from the full LLR message and discards the less important higher-order bits. This extraction approach maintains error correction performance by preserving the most significant information while reducing computational burden.
2Measurement precision
If the decoder counts the number of messages with specific reliability using multiple output bits, then the measurement precision is improved, but the device complexity and power consumption increase
Solution Approach 1:
The patent applies partial action by counting only the messages that meet a specific reliability threshold (using the magnitude bit) rather than performing exhaustive counting with full precision. This partial counting approach provides sufficient precision for error correction decisions while significantly reducing the complexity and power consumption associated with full-precision counting.
Data Source
AI summary
A method of operating a decoder, which has variable nodes and check nodes, includes receiving variable-to-check (V2C) messages from the variable nodes using a first check node among the check nodes. The number of messages having a specific magnitude among the V2C messages is counted. The magnitude of a check-to-variable (C2V) message to be transmitted to a first variable node, among the variable nodes, is determined based on the count value and the magnitude of a V2C message of the first variable node.