Layered LDPC Decoder Companding for Lower Memory and Power
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Solution Overview
Problem
Current LDPC decoders require large memory and significant processing power for soft-decision decoding, leading to high power consumption and area requirements.
Innovation Solution
The implementation of a layered LDPC decoder system that non-linearly compands soft information into lower precision formats, reducing the precision of internal bits while maintaining the dynamic range of data bits, thereby minimizing memory size and processing power required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If soft-decision decoding is used to achieve convergence with the true LDPC code, then decoding accuracy is improved, but memory size and processing power requirements increase significantly
Solution Approach 1:
The H matrix is divided into multiple layers, allowing the decoding process to be segmented into sequential layer processing steps. This segmentation enables the use of reduced precision arithmetic within each layer while maintaining overall decoding accuracy through the iterative nature of layered processing.
Solution Approach 2:
The patent changes the precision parameter of internal soft information representations from high precision to reduced precision formats. By carefully managing precision requirements through layered processing and selective precision operations, the system maintains decoding convergence while reducing memory storage requirements for soft values.
2Reliability
If soft-decision decoding is used to achieve convergence with the true LDPC code, then decoding accuracy is improved, but processing power consumption increases significantly
Solution Approach 1:
The decoding process is segmented into layered processing steps where each layer processes a subset of the H matrix. This segmentation allows for reduced precision arithmetic operations within each layer, decreasing the computational complexity and power consumption per iteration while maintaining overall decoding accuracy through multiple passes.
Solution Approach 2:
The patent applies parameter changes by reducing the precision of internal soft information representations during processing. This reduction in precision parameter directly decreases the number of computational operations required, thereby reducing processing power consumption while the layered structure ensures decoding accuracy is maintained through iterative refinement.
3Reliability
If high precision internal bits are used to maintain dynamic range, then decoding performance is improved, but memory size and area requirements increase
Solution Approach 1:
The H matrix is segmented into layers, allowing the decoder area to be organized into corresponding layer processing units. This segmentation enables the use of compact reduced precision data representations within each layer's processing elements, reducing the total area required for memory and logic while maintaining decoding performance through the coordinated operation of all layers.
Solution Approach 2:
The patent changes the precision parameter of internal representations from high to reduced precision, directly reducing the area required for storing and processing soft information. The layered processing structure compensates for the reduced precision by providing multiple processing passes, thereby maintaining decoding performance while significantly reducing the decoder's physical area.
Data Source
AI summary
Forward error correction (FEC) decoders, such as Low Density Parity Check (LDPC) decoders are described. Described FEC decoders minimize the number of internal bits in a layered processor of an LDPC decoder while maintaining high coding gain operation of the LDPC decoder. Minimizing the number of internal bits in a layered processor is achieved by non-linearly companding the soft information into lower precision format while maintaining the dynamic range of the data bits. Described FEC decoders may generate updated soft information having a precision that is equal to the channel precision.