LDPC Decoder Reliability-Ordered Updates for Flash Read Errors

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Solution Overview

Problem

Non-volatile flash memory devices face challenges in accurately reading data due to overlapping threshold voltage distributions, leading to increased read failure rates and errors as the number of bits programmed in each memory cell increases, causing reliability issues and data corruption.

Innovation Solution

A low density parity check (LDPC) decoder is employed to accurately and quickly read data from memory cells by updating codewords to variable nodes, determining an update order based on reliability, performing local iterations, and conducting syndrome checks until successful decoding or reaching a maximum number of iterations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-bit data is programmed in each memory cell to increase storage capacity, then data storage capacity is improved, but read reliability deteriorates due to overlapping threshold voltage distributions

Engineering Contradiction:
Improvedata storage capacityVSAvoidread reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The variable nodes are divided into multiple groups, and decoding is performed sequentially group by group rather than updating all nodes simultaneously. This segmentation allows the decoder to focus computational resources on correcting errors in each group, improving overall decoding reliability while maintaining the ability to handle multi-bit stored data.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The decoder performs preliminary updates on check nodes before updating variable nodes, and repeats this process across multiple iterations. By performing these preliminary actions in a structured sequence, the decoder progressively eliminates errors in the read data, thereby improving read reliability even when threshold voltage distributions overlap.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If conventional LDPC decoding updates all variable nodes simultaneously in each iteration, then decoding speed is maintained, but decoding accuracy deteriorates due to error propagation

Engineering Contradiction:
Improvedecoding speedVSAvoiddecoding accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

Variable nodes are divided into multiple groups that are updated sequentially rather than simultaneously. This segmentation prevents error propagation from one variable node update to another within the same iteration, thereby improving decoding accuracy while maintaining reasonable decoding speed through efficient group management.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The decoding process is organized into periodic iterations, where each iteration consists of updating check nodes followed by updating variable node groups in sequence. This periodic structure allows the system to systematically correct errors across all variable nodes over multiple cycles, improving accuracy without sacrificing overall decoding throughput.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11139832B1LDPC decoder and operating method thereof
Publication Date: 2021.10.05 MIMIRIP LLC
  • US11139832B1 patent drawing
  • US11139832B1 patent drawing
  • US11139832B1 patent drawing

AI summary

An operating method of a low density parity check (LDPC) decoder, the operating method includes: initially updating codewords to variable nodes; determining an update order in which a plurality of variable node groups are updated, which is determined based on reliability of each of the variable node groups; executing local iterations including update of check nodes associated with a select variable node group among the variable node groups and update of the select variable node group based on the updated check nodes until all the variable node groups are updated based on the update order; performing syndrome check to determine whether LDPC decoding is successful, based on an operation of the updated variable nodes and a parity check matrix.