LDPC Decoder Check-Node Grouping for Faster Convergence
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current LDPC decoders face inefficiencies in convergence due to sequential processing of check nodes and bit nodes, are ineffective in handling abnormal conditions like oscillating bit errors, and struggle with varying iteration requirements for decoding frames, leading to potential data loss or bit errors.
Innovation Solution
The method involves processing groups of check nodes in parallel, updating bit nodes sooner within an iteration, and using a nudge algorithm to address non-zero convergence issues, along with buffering and feedback systems to manage varying iteration requirements and detect abnormal conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If check nodes and bit nodes are processed sequentially in two separate steps, then the decoder structure is simple and easy to implement, but the convergence time increases and decoding efficiency decreases
Solution Approach 1:
The check nodes are divided into multiple groups, and within each iteration, different groups are processed in parallel. This segmentation allows overlapping of check node processing with bit node updating, reducing the total convergence time while maintaining a manageable decoder structure through modular group processing.
Solution Approach 2:
Bit nodes are updated preliminarily during the iteration before all check node processing is complete. This preliminary action allows subsequent check node groups to benefit from updated bit node values within the same iteration, accelerating convergence without requiring a complete restructuring of the decoder architecture.
2Productivity
If the decoder uses a fixed number of iterations based on average performance, then the decoding process is predictable and resource allocation is simplified, but frames requiring more iterations result in data loss or bit errors
Solution Approach 1:
The decoder dynamically adjusts the number of iterations for each frame based on convergence detection. By monitoring whether parity check equations are satisfied, the system adaptively determines when to stop iterating, allowing some frames to use fewer iterations while others receive more, thus maintaining both throughput and accuracy without fixed iteration limits.
Solution Approach 2:
A feedback mechanism monitors the convergence status of each decoding process by checking whether parity check equations are satisfied. This feedback information is used to dynamically control the iteration process, stopping early when convergence is achieved or continuing when more iterations are needed, thereby balancing throughput and reliability.
3Ease of operation
If the decoder processes all check nodes before updating bit nodes, then the processing logic is straightforward, but the number of iterations required for convergence increases
Solution Approach 1:
Check nodes are segmented into multiple groups that can be processed in parallel within an iteration. This segmentation enables the decoder to update bit nodes partially during the iteration rather than waiting for all check nodes, maintaining relatively simple processing logic while improving convergence speed through overlapping operations.
Solution Approach 2:
The decoder maintains continuous useful action by updating bit nodes during the iteration process rather than waiting for complete check node processing. This continuity allows the system to utilize processing time more effectively, reducing idle periods and accelerating convergence without significantly complicating the processing logic.
Data Source
AI summary
An LDPC decoder, applicable to LDPC codes including codes where check nodes within the same group are connected to a common bit node, successively processes groups of check nodes in a particular iteration, including updating bit nodes in that same iteration responsive to messages generated in response to processing a group of check nodes. Within an iteration, the LDPC decoder may also track the number of unresolved parity check equations, and cease iterating or output to an outer block decoder if that number reaches a local minima or standard minimum, falls below a predetermined threshold, or its rate of change falls below a predetermined threshold, indicating a lack of convergence or false convergence condition. The LDPC decoder may also provide a feedback assist to a demodulator. Also, a novel memory configuration may store messages generated by the decoder in the course of check node processing. The decoder may also employ a novel method for generating check node to bit node messages through a prescribed series of pair-wise computations.