LDPC Bit-Flipping Decoder With Integer Channel-Based Thresholds
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Solution Overview
Problem
Current LDPC error correction methods in NAND flash storage devices face challenges in reliability and hardware implementation due to non-integer thresholds and large unsatisfied check information ranges, which affect decoding performance and complexity.
Innovation Solution
An improved bit-flipping decoding algorithm that uses channel information to determine flip thresholds as integers, reducing computational complexity and optimizing parameter estimation through binning and least squares methods, allowing for efficient decoding with lower hardware requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-integer thresholds are used in bit-flipping decoding, then decoding performance is improved, but hardware implementation complexity increases
Solution Approach 1:
The patent transforms the threshold parameter from non-integer values to integer values, changing the parameter type to resolve the contradiction. By using integer thresholds instead of non-integer thresholds, the patent maintains decoding effectiveness while enabling simpler hardware implementation without requiring complex floating-point or fractional arithmetic units.
Solution Approach 2:
The patent employs simplified integer threshold comparisons that can be implemented with basic digital logic circuits, replacing complex non-integer threshold mechanisms. This approach uses simpler, more economical hardware components that can be easily implemented in FPGA or ASIC designs, reducing overall system cost and complexity.
2Measurement precision
If large unsatisfied check information ranges are processed, then decoding accuracy is improved, but computational complexity increases
Solution Approach 1:
The patent segments the large range of unsatisfied check information into smaller intervals or bins. By dividing the extensive range into multiple discrete segments, the patent reduces the computational burden of processing each individual value while maintaining overall decoding accuracy through aggregated analysis of segmented data.
Solution Approach 2:
The patent transforms the continuous or large-range unsatisfied check information parameter into a reduced set of discrete threshold levels. This parameter transformation compresses the information space, enabling efficient hardware implementation while preserving the essential decoding accuracy through strategically selected threshold values.
3Reliability
If complex threshold calculations are performed, then bit-flipping decisions are more accurate, but hardware requirements increase
Solution Approach 1:
The patent extracts the essential decision-making information from complex threshold calculations by identifying and using only the critical integer threshold values. This extraction process removes unnecessary computational complexity while retaining the core functionality needed for accurate bit-flipping decisions, enabling implementation with simpler hardware.
Solution Approach 2:
The patent replaces complex arithmetic calculation mechanisms with simpler digital logic comparison operations. By substituting intensive mathematical computations with basic integer comparison logic, the patent achieves similar decision accuracy with significantly reduced hardware requirements, suitable for embedded storage controller implementations.
Data Source
AI summary
An LDPC decoder receives channel information and performs a bit flipping algorithm to correct unsatisfied checks with respect to a parity matrix H. The threshold condition for determining whether to flip a bit is a function of the channel information itself. A threshold Thk used to evaluate the threshold condition may vary between iterations based on the number of iterations, number of bits flipped in the previous iteration, and number of unsatisfied checks. A threshold Thki may be calculated for each bit position. Thki and the threshold condition may be a function of whether bit position i was flipped in a previous iteration. A binning approach for parameters of the threshold condition may be used to reduce hardware complexity.