LDPC Decoder Memory Architecture for Multi-Protocol Chip Area Reduction

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Solution Overview

Problem

Conventional LDPC code decoders require a large number of read-only memories (ROMs) to store parity-check matrices for different communication protocols, leading to a significant increase in chip size as more protocols are supported.

Innovation Solution

A decoding method and system that uses dynamic memory to store and retrieve parity-check matrices, eliminating the need for ROMs by saving and accessing these matrices in a dynamic memory, which is connected to static random access memory (SRAM) for processing and verification.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple ROMs are used to store parity-check matrices for different communication protocols, then the decoder can support multiple protocols, but the chip area occupied by ROMs increases significantly

Engineering Contradiction:

Improveprotocol support capabilityVSAvoidchip area

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges multiple separate ROMs into a single unified ROM structure. Instead of having distinct ROMs for each communication protocol (DVB-T2, DVB-C2, DVB-S2, DVB-S2X), the invention combines all parity-check matrix storage into one shared ROM resource that can be dynamically accessed by different protocols, thereby reducing total chip area while maintaining multi-protocol support capability

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The unified ROM is designed to serve multiple functions across different communication protocols. A single ROM structure can store and provide parity-check matrices for various protocols (DVB-T2, DVB-C2, DVB-S2, DVB-S2X) by using different address ranges or configuration settings, making the ROM a universal storage resource that eliminates the need for protocol-specific dedicated ROMs

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS10826528B2Decoding method for low-density parity-check code and system thereof

Publication Date: 2020.11.03 REALTEK SEMICON CORP

AI summary

A decoding method for low-density parity-check (LDPC) code is provided and is configured to decode a communication protocol, which is pending to be tested. The communication protocol includes a code word, and the code word includes a code rate. The decoding method includes: receiving the code word of the communication protocol, which is pending to be tested; determining a parity-check matrix according to the code rate of the code word and saving the parity-check matrix in a dynamic memory; moving the parity-check matrix from the dynamic memory to a first memory and saving the code word in a second memory; sequentially transmitting the code word from the second memory to a plurality of check node units to calculate according to the parity-check matrix in the first memory; transmitting the code word verified by the check node units back to the second memory.