LDPC Decoder Scheduling Using Sub-Block Reliability Estimates
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Solution Overview
Problem
Current LDPC decoders face challenges in reducing decoding time and power consumption due to increased decoding iterations, which lead to higher chip area and power consumption, especially in wireless and portable devices.
Innovation Solution
The method involves dividing the parity check matrix of an LDPC code into sub-blocks and performing node operations for each decoding iteration, estimating the reliability of these sub-blocks, and adjusting the decoding schedule based on their reliability to optimize the decoding process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of decoding iterations is increased to achieve optimal decoding performance, then decoding reliability is improved, but decoding time and power consumption increase
Solution Approach 1:
The parity check matrix is divided into multiple sub-blocks, allowing the decoding process to operate on smaller units. This segmentation enables selective processing where only certain sub-blocks are decoded in each iteration based on reliability estimates, reducing the total number of operations needed while maintaining overall decoding reliability.
Solution Approach 2:
The decoding schedule is dynamically adjusted based on reliability estimates of sub-blocks. The update manager modifies which sub-blocks are processed in subsequent iterations according to their estimated reliability, creating an adaptive decoding process that optimizes the balance between reliability and decoding time.
2Reliability
If the number of decoding iterations is increased to achieve optimal decoding performance, then decoding reliability is improved, but power consumption increases
Solution Approach 1:
By segmenting the decoding process into sub-block operations, the system can terminate early for reliably decoded sub-blocks, avoiding unnecessary computational cycles and reducing overall power consumption while maintaining decoding reliability.
Solution Approach 2:
The system performs partial decoding actions only on sub-blocks that require it, based on reliability estimates. This partial action approach avoids the excessive power consumption of fully decoding all sub-blocks in all iterations, while still achieving the required reliability level.
3Productivity
If a large number of calculators are used to achieve high decoding data rate, then decoding throughput is improved, but chip area increases
Solution Approach 1:
The decoding functionality is segmented into modular sub-block processors that can be selectively activated. This allows the chip area to be optimized by only instantiating the necessary processing units based on the actual decoding requirements, rather than providing full capacity for all possible scenarios.
Solution Approach 2:
The decoding architecture uses universal calculator units that can process different sub-blocks based on dynamic scheduling. These multi-functional units replace the need for dedicated calculators for each sub-block, reducing the total chip area while maintaining high decoding throughput through efficient resource utilization.
Data Source
AI summary
A method of decoding a low density parity check (LDPC) code, includes dividing a parity check matrix of the LDPC code, into a plurality of sub blocks. The method further includes, for each of a plurality of decoding iterations, performing a node operation of each of target sub blocks among the plurality of sub blocks, the target sub blocks corresponding to a present decoding iteration among the plurality of decoding iterations, in a decoding schedule, estimating a reliability of each of the target sub blocks, based on a result of the node operation of each of the target sub blocks, and adjusting the decoding schedule, based on the reliability of each of the target sub blocks.