Soft Bit-Flipping LDPC Decoder With Selective Reliability Storage
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Solution Overview
Problem
Existing non-volatile memory devices, particularly NAND flash devices, face challenges in achieving efficient error correction with high convergence properties, leading to increased storage space requirements and power consumption due to the limitations of current error correction codes (ECCs).
Innovation Solution
The implementation of a soft bit-flipping decoder that improves convergence by generating reliability metrics for messages passing between variable and check nodes, storing these metrics only for messages with magnitudes less than or equal to a predetermined threshold, and performing single decoding iterations, thereby enhancing throughput and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If strong error-correction codes are used to improve data reliability, then data protection capability is improved, but storage space requirement increases due to extra ECC parity bits
Solution Approach 1:
The patent changes the parameter of reliability metric representation by storing only the top K largest magnitude values instead of all N message magnitudes. This parameter change reduces the storage space from O(N) to O(K) while maintaining the error correction capability through selective retention of most reliable messages.
2Device complexity
If conventional bit-flipping decoding algorithms are used, then implementation simplicity is maintained, but convergence speed is slow leading to high power consumption
Solution Approach 1:
The patent performs preliminary action by pre-identifying and storing the top K largest magnitude messages before the main decoding process. This preliminary sorting and selective storage enables the decoder to focus computational resources on the most reliable messages, accelerating convergence and reducing power consumption while maintaining algorithmic simplicity.
3Measurement precision
If all message reliability metrics are stored for accurate decoding, then decoding accuracy is improved, but memory footprint and processing overhead increase
Solution Approach 1:
The patent extracts only the essential information (top K largest magnitude values) from the complete set of message reliability metrics. By taking out only the most significant messages for storage and processing, the system achieves accurate decoding with reduced memory footprint and processing overhead, eliminating the need to handle all N messages.
Data Source
AI summary
Disclosed are devices, systems and methods improving the convergence of a soft bit-flipping decoder in a non-volatile memory device. An example method includes receiving a noisy codeword, the codeword having been generated based on a parity check matrix of an LDPC code and provided to a communication channel prior to reception by the soft bit-flipping decoder, generating, based on the noisy codeword, one or more messages for passing between a plurality of variable nodes and a plurality of check nodes of the soft bit-flipping decoder, generating a reliability metric for each of the one or more messages, storing the reliability metric only for messages comprising magnitudes that are less than or equal to a predetermined threshold value; and performing, based on the one or more messages and the associated reliability metric for at least one of the one more messages, a single decoding iteration of the soft bit-flipping decoder.