LDPC Error Correction Decoder for Fast Low-Complexity Storage Decoding
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Solution Overview
Problem
Conventional error correction decoders face challenges in achieving high error correction capacity, speed, and reduced complexity and size, particularly as storage devices are scaled down, leading to increased error rates.
Innovation Solution
An operating method and device for an error correction decoder based on low-density parity check (LDPC) codes, which updates log-likelihood values of variable nodes using minimum and candidate values, optimizing error correction by sequentially selecting nodes and updating values in real-time, thereby improving error correction speed and reducing complexity and size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction capacity is improved, then error correction capability increases, but complexity and size increase, causing a decrease in error correction speed
Solution Approach 1:
The error correction decoder is divided into multiple processing units that operate in parallel. Each unit handles a portion of the decoding task, allowing the system to achieve high error correction capacity while maintaining reduced complexity through modular design. The parallel structure enables simultaneous processing of multiple data blocks without requiring a single complex decoder.
Solution Approach 2:
The decoder dynamically adjusts its operation mode based on the error rate and data characteristics. By switching between different decoding algorithms and parameters in real-time, the system optimizes the balance between error correction capacity and processing speed, avoiding the need for a permanently complex design that would slow down normal operation.
2Reliability
If error correction capacity is improved, then error correction capability increases, but device size increases
Solution Approach 1:
The decoder is segmented into multiple smaller processing units that can be distributed across available hardware resources. This segmentation allows the system to achieve high error correction capacity through parallel processing rather than through a single large complex unit, thereby reducing the overall device size while maintaining or improving error correction capability.
Solution Approach 2:
Multiple simplified decoder instances are deployed in parallel rather than one complex decoder. Each instance is a simplified copy that handles a subset of the error correction task, allowing the system to achieve high capacity through replication of simple units rather than through a single large unit, thus reducing device size.
3Ease of manufacture
If conventional error correction methods are used, then implementation is straightforward, but error correction speed decreases due to increased complexity
Solution Approach 1:
The decoding process is segmented into independent stages that can be implemented using straightforward conventional methods at each stage. By breaking down the complex decoding task into simpler sequential or parallel stages, the system maintains implementation simplicity while achieving high speed through parallel execution of these stages.
Solution Approach 2:
The system dynamically selects and switches between different error correction algorithms based on the detected error patterns and performance requirements. This allows the use of simple fast algorithms for common cases while resorting to more complex algorithms only when necessary, thereby maintaining high average speed without sacrificing the ability to handle difficult error cases.
Data Source
AI summary
An operating method of an error correction decoder includes receiving data, setting initial log-likelihood values of variable nodes, and decoding the received data by updating a log-likelihood value of a selected variable node by use of a minimum value and a minimum candidate value associated with the selected variable node. The minimum value indicates a minimum value of absolute values of log-likelihood values of first variable nodes sharing a check node with the selected variable node and including the selected variable node. The minimum candidate value indicates one from among absolute values of log-likelihood values of second variable nodes that has the smallest value greater than the minimum value. The second variable nodes are selected later than one from among the first variable nodes corresponding to the minimum value.