LDPC Bit-Flipping Decoder With Iteration-Dependent Thresholds
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Solution Overview
Problem
Existing bit-flipping decoding algorithms for NAND flash storage devices do not effectively utilize channel information, leading to inefficiencies in error correction and hardware complexity due to non-integer thresholds and large unsatisfied check information ranges.
Innovation Solution
The proposed algorithm uses channel information to improve decoding performance by formulating bit flipping decisions based on parameters estimated from training data, with integer thresholds and binning approaches to reduce computational complexity, specifically using equations (1) and (2) to determine flipping criteria and calculating flip thresholds as described in Algorithms 1, 2, and 3.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional bit-flipping decoding algorithms are used without channel information, then the decoding process is simpler, but error correction performance deteriorates
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing channel information (such as read distri bution tables indicating likelihood of 0 or 1 for each read level) during device manufacturing or initialization. This pre-computed channel information is then readily available during decoding operations to guide bit-flipping decisions, improving error correction without adding real-time computational complexity.
Solution Approach 2:
The patent introduces channel information as an intermediary element that mediates between the received data and the decoding process. This channel information (including read distribution characteristics and likelihood values) acts as a bridge that provides additional context to the decoder, enabling more informed bit-flipping decisions without requiring complex real-time analysis.
2Measurement precision
If non-integer thresholds are used in bit-flipping decisions, then decoding accuracy improves, but hardware implementation complexity increases
Solution Approach 1:
The patent applies parameter changes by transforming the bit-flipping threshold from a continuous non-integer value to a discrete integer value. Specifically, the threshold is changed from a floating-point number to an integer that can be directly implemented in hardware comparators and counters, maintaining sufficient decoding accuracy while enabling simple digital circuit implementation.
3Reliability
If the full range of unsatisfied check information is processed, then decoding completeness improves, but computational complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the range of unsatisfied check counts into discrete bins or intervals. Instead of processing every possible value individually, the patent groups values into segments (e.g., 0-3 unsatisfied checks, 4-7 unsatisfied checks, etc.), allowing the decoder to handle a broader range of cases efficiently while maintaining decoding completeness through the binning approach.
Data Source
AI summary
An LDPC decoder receives channel information and performs a bit flipping algorithm to correct unsatisfied checks with respect to a parity matrix H. The threshold condition for determining whether to flip a bit is a function of the channel information itself. A threshold Thk used to evaluate the threshold condition may vary between iterations based on the number of iterations, number of bits flipped in the previous iteration, and number of unsatisfied checks. A threshold Thki may be calculated for each bit position. Thki and the threshold condition may be a function of whether bit position i was flipped in a previous iteration. A binning approach for parameters of the threshold condition may be used to reduce hardware complexity.