LDPC Decoder Reconfiguration for Throughput-Power Tradeoffs
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Solution Overview
Problem
Existing ECC decoders face challenges in optimizing the tradeoff between area, throughput, and power consumption due to constraints on silicon area, cost, power budget, error correction capability, and throughput requirements, particularly when supporting multiple decoding modes with different parallelism levels and message resolutions.
Innovation Solution
The solution involves setting the parallelism level of data processing units based on power consumption, frequency of use, and message resolution, and implementing transformations of the parity check matrix to enable different decoding modes to operate efficiently, allowing for hardware re-use and efficient power management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a high degree of parallelism is used in ECC decoder, then throughput performance is improved, but power consumption increases beyond the power budget
Solution Approach 1:
The patent implements dynamic configuration of the ECC decoder where the parallelism degree is adjusted based on the selected decoding mode. The system transitions from a static design to a dynamic one where data processing units are enabled or disabled according to operational requirements, allowing high throughput when needed while reducing power consumption during normal operation.
Solution Approach 2:
The patent changes the operational parameters of the ECC decoder by implementing multiple decoding modes with different parallelism degrees. The system can switch between a first decoding mode with higher parallelism for high-throughput requirements and a second decoding mode with lower parallelism for power-constrained scenarios, effectively managing the tradeoff between throughput and power consumption.
2Adaptability or versatility
If multiple decoding modes with different parallelism levels are supported, then adaptability is improved, but device complexity increases
Solution Approach 1:
The patent implements a universal ECC decoder architecture that can operate in multiple decoding modes. The same data processing units and logic resources are reused across different decoding modes, with the system selectively enabling or disabling specific units based on the required parallelism level. This multi-functional design achieves adaptability without proportionally increasing device complexity.
Solution Approach 2:
The patent segments the ECC decoder into multiple data processing units that can be independently controlled. By dividing the decoder into modular units, the system can selectively activate a specific number of units based on the desired parallelism degree, allowing flexible adaptation to different operational requirements while maintaining a manageable overall structure.
3Use of energy by moving object
If reduced-resolution soft decoding mode is implemented, then power consumption is reduced, but error correction capability decreases
Solution Approach 1:
The patent implements a reduced-resolution soft decoding mode that uses a subset of the full resolution data during decoding operations. By processing only the most significant bits or a reduced number of message bits, the system achieves lower power consumption while maintaining adequate error correction capability for many practical scenarios. The full-resolution mode remains available when maximum error correction is required.
Data Source
AI summary
A device includes a low density parity check (LDPC) decoder that is configured to receive a representation of a codeword. The LDPC decoder includes a circuit configured to set a message length of a decoding message at least partially based on an error metric associated with the representation of the codeword. The LDPC decoder also includes a processing unit including a first group of components and a second group of components. The processing unit configured to selectively couple the first group of components to the second group of components based on the message length of the decoding message.