Programmable LDPC Decoder for Variable Codeword Lengths

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Solution Overview

Problem

Existing LDPC decoders face challenges in reducing hardware implementation costs and flexibility in decoding various LDPC codes and codeword lengths, limiting their ability to efficiently process different code structures and lengths.

Innovation Solution

The development of a programmable LDPC decoder that uses a lifting factor Z=K×N, allowing for implementation parallelism N, which enables decoding of different codeword sizes and code structures by executing microcode K times, with N parallel units processing associated with Z nodes, reducing hardware complexity and increasing throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a fixed-structure LDPC decoder is used, then hardware implementation cost is reduced, but flexibility to decode various LDPC codes and codeword lengths is limited

Engineering Contradiction:
Improvehardware implementation costVSAvoidflexibility to decode various LDPC codes
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent implements a programmable LDPC decoder where the hardware structure can be dynamically reconfigured through microcode to support different LDPC codes and codeword lengths. The decoder uses a lifting factor Z=K×N that can be programmatically adjusted, allowing the same physical hardware to adapt to various code structures without requiring separate dedicated circuits for each code type.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent creates a universal LDPC decoder architecture that can decode multiple types of LDPC codes with different parameters. By implementing N parallel processing units that can be controlled through microcode, a single decoder device performs multiple decoding functions, eliminating the need for separate hardware implementations for each code variant.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If parallel processing units are increased to decode different codeword sizes, then throughput is improved, but hardware complexity increases

Engineering Contradiction:
Improvedata throughputVSAvoidhardware complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the LDPC decoding process into N parallel processing units, each handling a portion of the codeword. This segmentation allows the decoder to process multiple elements simultaneously, improving throughput. The lifting factor decomposition Z=K×N enables this parallel structure where K represents the base code size and N represents the number of parallel units, achieving high throughput without requiring a completely separate decoder for each processing unit.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8683289B2LDPC decoding methods and apparatus
Publication Date: 2014.03.25 QUALCOMM INC
  • US8683289B2 patent drawing
  • US8683289B2 patent drawing
  • US8683289B2 patent drawing

AI summary

A flexible and relatively hardware efficient LDPC decoder is described. The decoder can be implemented with a level of parallelism which is less than the full parallelism of the code structure used to control the decoding process. Each command of a relatively simple control code used to describe the code structure can be stored and executed multiple times to complete the decoding of a codeword. Different codeword lengths are supported using the same set of control code instructions but with the code being implemented a different number of times depending on the codeword length. The decoder can switch between decoding codewords of different lengths, without the need to change the stored code description information, by simply changing a code lifting factor that is indicative of codeword length and is used to control the decoding process. When decoding codewords shorter than the maximum supported codeword length some block storage locations may go unused.