LDPC Decoding with Hard-Soft Bit Updates for Low Memory Power
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Solution Overview
Problem
Existing error-correction decoding methods for Low-Density Parity-Check (LDPC) codes require high computational complexity and large memory, making them inefficient for battery-operated devices and flash memory systems.
Innovation Solution
A method that uses low-complexity algorithms to update hard-bit and soft-bit values during iterative decoding, reducing memory and power requirements by associating bits with one-bit hard-bit values and multiple-bit soft-bit values, and computing update values that are common to multiple bits or specific to each bit, depending on parity-check equation satisfaction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If soft decision decoding algorithms are used to achieve near Shannon limit performance, then decoding accuracy is improved, but computational complexity and memory requirements increase significantly
Solution Approach 1:
The decoding process is segmented into two distinct phases: a low-complexity hard decision decoding phase that quickly corrects easily detectable errors, followed by an optional soft decision decoding phase that activates only when hard decision decoding fails. This segmentation allows the system to achieve high reliability while minimizing average computational complexity by avoiding full soft decision processing for all codewords.
Solution Approach 2:
The patent applies partial soft decision decoding by performing soft decision processing only on bits that were incorrectly decoded during the hard decision phase, rather than processing all bits through the computationally intensive soft decision algorithm. This partial application maintains high decoding accuracy while significantly reducing the average computational complexity and power consumption.
2Reliability
If full soft decision decoding is implemented, then decoding performance is improved, but power consumption increases
Solution Approach 1:
The decoding system operates in periodic cycles, alternating between hard decision decoding and soft decision decoding based on the needs of each codeword. The hard decision decoding serves as the primary periodic operation with low power consumption, while soft decision decoding is activated periodically only when required, creating a power-efficient operational pattern that maintains high performance.
Solution Approach 2:
Soft decision decoding is applied partially only to specific bits that failed hard decision decoding, rather than processing all bits through the power-intensive soft decision algorithm. This selective application dramatically reduces average power consumption while maintaining decoding performance close to full soft decision decoding.
3Reliability
If iterative message passing decoding is used to achieve near Shannon limit performance, then decoding accuracy is improved, but memory requirements increase
Solution Approach 1:
The memory requirements are segmented by implementing hard decision decoding first, which has minimal memory requirements. Only when hard decision decoding fails does the system activate soft decision decoding with its higher memory requirements. This segmentation allows the system to achieve high reliability while keeping average memory requirements low, as full soft decision decoding memory is not needed for all operations.
Data Source
AI summary
An example method is provided that includes receiving a representation of a codeword that includes a plurality of bits, and associating the bits with a respective plurality of one-bit hard-bit values representing the bits and multiple-bit soft-bit values representing measures of reliability of respective hard-bit values. The method includes for each of a plurality of iterations, updating a hard-bit/soft-bit value of one or more bits of a respective subset of the bits as a function of current hard-bit values of the subset's bits, and the current hard-bit and soft-bit values of the respective bit. For two iterations in which the current hard-bit and soft-bit values for each bit of a subset for both iterations is the same, the hard-bit/soft-bit value updated for any bit of the subset during one of the two iterations is the same as that computed for the respective bit during the other of the two iterations.