LDPC Iterative Decoding with Skip Counters for Faster Updates
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Solution Overview
Problem
Existing iterative decoding schemes for low-density parity-check (LDPC) codes are inefficient due to unnecessary processing time, as all block columns are processed at each iteration, even though only a few may require flipping, leading to reduced decoder efficiency.
Innovation Solution
Implementing a method where certain decoding variables or block columns are skipped based on computed metrics and thresholds, allowing for pipelined processing and reordering of variable nodes to reduce unnecessary operations and memory access, thereby optimizing the decoding process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all block columns are processed at each iteration, then decoding reliability is maintained, but processing time and power consumption increase
Solution Approach 1:
The patent extracts and identifies specific block columns that require processing by checking unsatisfied check nodes, then processes only those extracted block columns rather than all block columns. This is achieved through the skip counter mechanism that tracks which block columns need attention in each iteration, separating the necessary processing from unnecessary operations.
Solution Approach 2:
The patent applies partial action by processing only a subset of block columns that are identified as needing processing based on unsatisfied check nodes. The skip counter enables the decoder to perform partial processing (only necessary block columns) rather than excessive processing (all block columns), reducing time loss while maintaining reliability.
2Reliability
If all block columns are processed at each iteration, then decoding completeness is ensured, but power consumption increases
Solution Approach 1:
The patent extracts only the necessary block columns for processing by identifying those associated with unsatisfied check nodes. The skip counter mechanism extracts the minimal set of block columns needed, preventing unnecessary power consumption from processing already-satisfied block columns while ensuring decoding completeness.
Solution Approach 2:
The patent applies partial action by performing decoding operations only on block columns that require processing, as determined by the skip counter and unsatisfied check node status. This reduces power consumption by avoiding excessive processing of block columns that are already satisfied, while maintaining decoding completeness through selective processing.
3Productivity
If skip counters and flag vectors are implemented to optimize processing, then processing efficiency improves, but device complexity increases
Solution Approach 1:
The skip counter and flag vector implement self-service by automatically tracking and indicating which block columns require processing without external intervention. The flag vector self-updates based on check node satisfaction status, and the skip counter automatically decrements and triggers processing when appropriate, reducing the need for complex external control logic.
Solution Approach 2:
The patent implements feedback through the flag vector that provides real-time status information about check node satisfaction to the skip counter mechanism. This feedback loop enables the decoder to dynamically adjust processing based on decoding progress, improving efficiency while keeping complexity manageable through structured feedback rather than complex control algorithms.
Data Source
AI summary
System and methods described herein includes a method for iterative decoding. The method includes instantiating an iterative decoding procedure to decode a codeword. At each iteration of the iterative decoding procedure, the method further includes retrieving information relating to a plurality of current decoding variables at a current iteration, determining a first current decoding variable to be skipped for the current iteration based on the information, and processing a second decoding variable without processing the first decoding variable to update related decoding variables from the plurality of current decoding variables.