LDPC Bit Mapping by Degree for Reliable High-Order Modulation

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Solution Overview

Problem

Existing communication systems using LDPC codes fail to minimize signal distortion effectively due to arbitrary interleaving schemes that do not consider the reliability characteristics of modulation signal-constituent bits, leading to suboptimal performance.

Innovation Solution

A method and apparatus that utilize an interleaving and bit mapping scheme where LDPC codeword bits are ordered by degree and mapped to modulation signal-constituent bits based on their reliability, specifically mapping higher-degree bits to higher-reliability bits and lower-degree bits to medium-reliability bits, to improve decoding performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If arbitrary interleaving schemes are used in LDPC code systems, then implementation simplicity is maintained, but signal distortion is not minimized effectively and decoding performance deteriorates

Engineering Contradiction:
Improvedecoding performanceVSAvoidinterleaving scheme complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by systematically varying the interleaving pattern based on the degree values of LDPC codeword bits. Specifically, bits are divided into groups according to their degree (number of connections in the Tanner graph), and each group is assigned to different modulation signal-constituent bit positions. This parameter-based classification and assignment optimizes the mapping between codeword bits and modulation bits, improving decoding performance while maintaining a structured yet manageable interleaving complexity.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If higher-degree LDPC bits are mapped to higher-reliability modulation bits, then Bit Error Rate is reduced, but the mapping complexity increases

Engineering Contradiction:
ImproveBit Error RateVSAvoidbit mapping complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements local quality by assigning different mapping strategies to different groups of LDPC codeword bits based on their local characteristics (degree values). Higher-degree bits, which have more connections in the Tanner graph and thus greater influence on decoding, are mapped to modulation signal-constituent bits with higher reliability positions. Lower-degree bits are mapped to positions with medium reliability. This localized, differentiated mapping approach optimizes the overall Bit Error Rate by ensuring that the most critical bits occupy the most reliable positions, while keeping the mapping rule systematic and implementable.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP2206262B1Apparatus and method for transmitting and receiving data in a communication system using low density parity check code
Publication Date: 2016.04.06 SAMSUNG ELECTRONICS CO LTD
  • EP2206262B1 patent drawingFigure 1~2
  • EP2206262B1 patent drawingFigure 3A~3B
  • EP2206262B1 patent drawingFigure 3C

AI summary

A method for transmitting data in a communication system using a Low Density Parity Check (LDPC) matrix. The method includes generating an LDPC codeword by encoding information data bits, interleaving the LDPC codeword, mapping the interleaved LDPC codeword to a modulation signal, and generating a mapped signal by mapping the LDPC codeword bits separately to a bit corresponding to a real part and a bit corresponding to an imaginary part of said modulation signal, among bits constituting the modulation signal, generating a modulation signal by high-order-modulating the mapped signal and Radio Frequency (RF)-processing the modulation signal, and transmitting the RF-processed signal via a transmission antenna.