LDPC Encoder Structure for 64800-Bit 3/15 Codeword Encoding

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Solution Overview

Problem

Current terrestrial TV broadcasting systems face co-channel interference issues, leading to white spaces where frequency reuse is not possible, resulting in deteriorated spectrum efficiency, and existing LDPC codes are not optimized for the DVB broadcast standard or specific LDPC encoding methods.

Innovation Solution

A new LDPC codeword with a length of 64800 and code rate of 3/15 is developed, utilizing an LDPC encoding technique that efficiently performs encoding using a sequence derived from a parity check matrix, specifically designed for terrestrial cloud transmission, incorporating a systematic part, first parity part, and second parity part, with a circulant permutation matrix size of 360, to facilitate robust reception and demodulation in overlapping signal areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a new LDPC code with length 64800 and code rate 3/15 is used, then decoding performance and spectrum efficiency are improved, but device complexity and implementation difficulty increase

Engineering Contradiction:
Improvedecoding performanceVSAvoidimplementation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The LDPC codeword is segmented into a systematic part (12960 bits) and a parity part (51840 bits). The parity part is further divided into first parity bits (1800 bits) and second parity bits (50040 bits). This segmentation allows the encoder to process and store different parts separately, reducing the complexity of handling the entire 64800-bit codeword as a single block while maintaining the code's error correction performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent pre-defines the parity check matrix H with specific dimensions (19440×64800) and code rate (3/15) before transmission. The systematic part and parity part structures are predetermined, allowing the receiver to prepare corresponding storage areas and processing logic in advance. This preliminary configuration reduces real-time computational complexity during actual encoding and decoding operations.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If frequency reuse is enabled in overlapping signal areas, then spectrum efficiency is improved, but co-channel interference increases

Engineering Contradiction:
Improvespectrum efficiencyVSAvoidco-channel interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful effect of co-channel interference into a beneficial feature by designing the LDPC code with specific error correction capabilities. The parity check matrix is constructed to handle the interference patterns that occur in frequency reuse scenarios, transforming the previously harmful interference into a manageable signal characteristic that the decoder can correct, thereby enabling aggressive frequency reuse without performance degradation.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent changes key parameters of the LDPC code including code rate (3/15), codeword length (64800 bits), and parity check matrix dimensions (19440×64800) to optimize performance in frequency reuse environments. These parameter adjustments are specifically tailored to provide robust error correction capability that can withstand the co-channel interference present when frequencies are reused in overlapping coverage areas.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11463109B2Low density parity check encoder having length of 64800 and code rate of 3/15, and low density parity check encoding method using the same
Publication Date: 2022.10.04 ELECTRONICS & TELECOMM RES INST
  • US11463109B2 patent drawing
  • US11463109B2 patent drawing
  • US11463109B2 patent drawing

AI summary

A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 3/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).