LDPC Encoder Sequence Design for Co-Channel Broadcast Interference

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Solution Overview

Problem

Current terrestrial TV broadcasting systems face significant co-channel interference issues, leading to white spaces where frequency reuse is not possible, resulting in deteriorated spectrum efficiency, especially in areas where timing and frequency synchronization between signals are not guaranteed.

Innovation Solution

A new Low Density Parity Check (LDPC) code with a length of 64800 and a code rate of 5/15 is developed, incorporating an LDPC encoding technique using a specific sequence for parity check matrices, which enables efficient encoding and decoding of LDPC codewords, allowing for robust reception and demodulation of overlapping terrestrial cloud broadcast signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If terrestrial TV broadcasting uses conventional transmission technology, then coverage area can be provided, but co-channel interference occurs and frequency reuse is not possible, resulting in deteriorated spectrum efficiency

Engineering Contradiction:
Improvereception robustnessVSAvoidspectrum efficiency
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies parameter changes by developing an LDPC code with specific parameters (code length of 64800 and code rate of 5/15) that differs from conventional codes. This optimized code structure enables the system to achieve both reception robustness and spectrum efficiency by changing the error correction parameters to better handle co-channel interference while maintaining reliable reception in overlap areas.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If LDPC code with length of 64800 and code rate of 5/15 is used, then reception robustness and spectrum efficiency are improved, but encoding and decoding complexity increases

Engineering Contradiction:
Improvereception robustnessVSAvoidencoding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the LDPC encoding process into distinct functional blocks: an encoder that generates the codeword, an interleaver that rearranges bits according to a specific pattern, and a mapper that assigns modulated symbols to time-frequency resources. This segmented architecture manages the complexity of the 64800-length code by organizing the processing steps systematically, making the implementation more tractable while maintaining the code's error correction performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies dynamics through the use of an interleaver that dynamically rearranges the LDPC codeword bits according to a specific interleaving pattern before mapping. This dynamic reordering optimizes the distribution of error patterns across the transmitted signal, enhancing the code's ability to correct errors in overlapping broadcast areas while managing the computational complexity through structured randomness.

Inventive Principle:
Principle #15Dynamics

3Productivity

If receiver demodulates terrestrial cloud broadcast signals in overlap area, then frequency reuse is enabled, but co-channel interference and synchronization issues occur

Engineering Contradiction:
Improvespectrum efficiencyVSAvoidsignal demodulation accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies beforehand cushioning by incorporating a powerful LDPC code with code rate 5/15 that is specifically designed to preemptively handle the expected co-channel interference in overlap areas. The code's strong error correction capability acts as a cushion against the interference that will occur during frequency reuse, allowing the receiver to successfully demodulate signals even in challenging overlap conditions without requiring complex interference cancellation algorithms.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS9735808B2Low density parity check encoder having length of 64800 and code rate of 5/15, and low density parity check encoding method using the same
Publication Date: 2017.08.15 ELECTRONICS & TELECOMM RES INST
  • US9735808B2 patent drawing
  • US9735808B2 patent drawing
  • US9735808B2 patent drawing

AI summary

A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 5/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).