LDPC Encoder Structure for 16200-Length Broadcast Interference Mitigation
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Solution Overview
Problem
Current terrestrial TV broadcasting systems face significant co-channel interference issues, leading to white spaces where frequency reuse is not possible, resulting in deteriorated spectrum efficiency, especially in areas where signal overlap and synchronization are not guaranteed.
Innovation Solution
A new Low Density Parity Check (LDPC) code with a codeword length of 16200 and a code rate of 3/15 is developed, utilizing an LDPC encoding technique that efficiently performs encoding using a sequence derived from a parity check matrix, specifically designed for terrestrial cloud transmission systems to mitigate co-channel interference and enhance spectrum efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If terrestrial TV broadcasting uses conventional transmission technology, then coverage area is maintained, but co-channel interference occurs and spectrum efficiency deteriorates due to white spaces
Solution Approach 1:
The patent applies parameter changes by modifying the LDPC code parameters (code length N=16200, code rate R=3/15, and specific parity check matrix structure) to optimize performance for cloud transmission. The parity check matrix is designed with specific circulant permutation matrices and zero matrices to achieve both robustness and spectrum efficiency. This resolves the contradiction by finding optimal parameter values that satisfy both reception reliability and spectrum efficiency requirements.
2Productivity
If frequency reuse is implemented in overlap areas, then spectrum efficiency improves, but co-channel interference increases and signal demodulation becomes difficult
Solution Approach 1:
The patent applies preliminary action by pre-designing the LDPC code structure with specific properties (code rate 3/15, length 16200, and structured parity check matrix) that provide inherent robustness against co-channel interference. The code is designed in advance to handle the expected interference conditions in cloud transmission scenarios, enabling reliable demodulation before signals are actually received in overlap areas.
Solution Approach 2:
The patent uses a specifically designed LDPC code structure that can be efficiently encoded and decoded with relatively simple operations. The systematic structure with separate information and parity parts allows for efficient processing, making it feasible to implement frequency reuse with multiple transmitters without requiring complex signal processing at the receiver.
3Adaptability or versatility
If LDPC encoding uses traditional methods with different code lengths, then compatibility with existing standards is maintained, but applicability to cloud transmission with code length 16200 is limited
Solution Approach 1:
The patent applies segmentation by dividing the codeword into systematic parts (information bits) and parity parts, with the parity part further structured using circulant permutation matrices. This segmentation allows the encoder to process data in manageable blocks and enables efficient implementation using standardized matrix structures, making the code both adaptable to length 16200 and easier to implement.
Solution Approach 2:
The patent changes the code parameters to N=16200 and R=3/15, which are specifically optimized for cloud transmission. The parity check matrix is constructed with specific dimensions and patterns (using 360-point DFT matrices and structured zero/CPM blocks) that enable efficient encoding while achieving the desired code length and rate, thus resolving the contradiction between adaptability and implementation ease.
Data Source
AI summary
A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 16200 and a code rate of 3/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).


