LDPC Encoder Sequence Table for 64800-Length DVB Codewords
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Solution Overview
Problem
Current terrestrial TV broadcasting systems face co-channel interference issues, leading to white spaces where frequency reuse is not possible, resulting in deteriorated spectrum efficiency, and existing LDPC codes are not optimized for the DVB broadcast standard or specific LDPC encoding methods.
Innovation Solution
A new LDPC codeword of length 64800 with a code rate of 4/15 is developed, utilizing an LDPC encoding technique that efficiently performs encoding using a sequence derived from the sum of systematic and parity parts divided by a circulant permutation matrix size, specifically using a sequence table to update parity bit addresses for efficient LDPC encoding and decoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a new LDPC codeword with length 64800 and code rate 4/15 is designed, then error correction performance is improved, but device complexity increases
Solution Approach 1:
The LDPC codeword is segmented into a systematic part (17280 bits) and a parity part (47520 bits), with the parity part further divided into first parity bits (1800 bits) and second parity bits (45720 bits). This segmentation allows the encoder to process different portions of the codeword using different strategies, improving error correction performance while managing complexity through structured organization.
Solution Approach 2:
The patent employs specific parameter configurations including code rate 4/15, codeword length 64800, systematic part length 17280, first parity part length 1800, and second parity part length 45720. These parameter changes are optimized to achieve superior error correction performance compared to conventional LDPC codes, particularly in terrestrial cloud transmission scenarios.
2Productivity
If an efficient LDPC encoding technique using sequence table is implemented, then productivity is improved, but device complexity increases
Solution Approach 1:
The parity check matrix is pre-processed to generate a sequence table that stores optimized parity bit address information. This preliminary action allows the encoder to quickly retrieve addressing patterns during encoding operations, significantly improving encoding speed while reducing the need for complex real-time calculations.
Solution Approach 2:
The patent uses a sequence table that copies and stores pre-calculated parity bit address patterns. Instead of computing addresses during encoding, the system retrieves pre-computed address sequences from memory, improving encoding productivity while managing memory requirements through efficient table structures.
Data Source
AI summary
A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 4/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).