LDPC FEC Padding Mechanism for Wireless Payload Efficiency

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Solution Overview

Problem

Existing wireless communication systems using Forward Error Correction (FEC) coding in the Physical Layer (PHY) Protocol Data Unit (PPDU) face challenges with high padding ratios, especially for small payload sizes, leading to suboptimal performance.

Innovation Solution

The implementation of an Enhanced Low-Density Parity-Check (LDPC) coding scheme with a modified FEC padding mechanism that reduces the padding ratio by increasing the granularity of pre-FEC padding and minimizing or excluding post-FEC padding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional FEC padding mechanism is used, then error correction capability is maintained, but padding ratio increases leading to reduced transmission efficiency

Engineering Contradiction:
Improveerror correction capabilityVSAvoidtransmission efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent changes the padding parameters by introducing a new padding value calculation method that depends on the payload size. Specifically, it uses different padding values for different payload size ranges (e.g., 0 for payloads >= 128 bytes, 4 for payloads >= 64 bytes but < 128 bytes, etc.), thereby optimizing the balance between error correction capability and transmission efficiency for different data sizes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The padding mechanism becomes dynamic by adapting the padding value based on the actual payload size. The system dynamically selects appropriate padding values from a set of predefined values (0, 4, 8, 12, 16, 20, 24, 28, 32 bytes) according to the payload size, rather than using a fixed padding scheme, thus optimizing performance for varying data lengths

Inventive Principle:
Principle #15Dynamics

2Productivity

If padding ratio is reduced for small payloads, then transmission efficiency improves, but error correction robustness may be compromised

Engineering Contradiction:
Improvetransmission efficiencyVSAvoiderror correction robustness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies parameter changes by introducing a systematic relationship between payload size and padding value. For small payloads (e.g., < 64 bytes), it applies larger padding values (20-32 bytes) to maintain error correction robustness, while for larger payloads it reduces or eliminates padding to improve efficiency. This adaptive parameter selection ensures robustness is maintained where needed while efficiency is optimized where possible

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250070909A1Apparatus, system, and method of forward error correction (FEC) coding
Publication Date: 2025.02.27 INTEL CORP
  • US20250070909A1 patent drawing
  • US20250070909A1 patent drawing
  • US20250070909A1 patent drawing

AI summary

For example, a STA may determine a pre-FEC padding factor value for a PPDU, the pre-FEC padding factor value in a range between 1 and 2Na, wherein Na is an integer greater than 2; set Na bits in a Signal (SIG) field of the PPDU to indicate the pre-FEC padding factor value; and encode a data field of the PPDU according to a FEC coding based on the pre-FEC padding factor value. For example, a STA may encode a data field of a PPDU according to a FEC coding based on a pre-FEC padding factor value and based on a condition that no post-FEC padding is to be applied for the PPDU; and set an LDPC extra symbol subfield in a SIG field of the PPDU to indicate whether or not an LDPC extra symbol is present based on encoding of the data field of the PPDU.