LDPC Flash Memory Decoding via LLR Soft Values
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Solution Overview
Problem
Multi-level cell (MLC) flash memories face challenges in data reliability due to disturbances during write/read and retention, with higher order modulation leading to unpredictable programming and less reliable retention and reading, and existing soft decoding methods are impractical due to the lack of soft channel output.
Innovation Solution
The implementation of Log-Likelihood Ratios (LLRs) computed from observed statistics to provide soft values for LDPC probabilistic decoders, using transition probability matrices for write, retention, and read errors, enabling soft encoding and decoding to maximize data reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If higher order modulation is used in MLC flash memory to increase storage capacity, then more bits per cell are stored, but programming becomes unpredictable and retention reliability deteriorates
Solution Approach 1:
The patent applies parameter changes by transitioning from hard decoding to soft decoding, where the decoder processes Log-Likelihood Ratio (LLR) values that represent the probability of each bit being correct. This allows the system to optimize for higher storage capacity while maintaining reliability through probabilistic decision-making rather than deterministic thresholding. The soft decoder uses channel state information and LLR values to make more informed decoding decisions, accommodating the increased uncertainty from higher order modulation.
2Quantity of substance
If higher order modulation is used in MLC flash memory to increase storage capacity, then more bits per cell are stored, but retention reliability deteriorates
Solution Approach 1:
The patent employs parameter changes by implementing soft decoding that processes LLR values which capture the reliability information of each received bit. This approach allows the system to handle the degraded retention characteristics of higher order modulation by using probabilistic soft decisions rather than hard decisions. The decoder can weigh the reliability of each bit based on its LLR value, thereby maintaining overall data integrity even when retention conditions are suboptimal.
3Reliability
If soft decoding is implemented to improve data reliability, then error correction performance improves, but the method becomes impractical due to lack of soft channel output
Solution Approach 1:
The patent applies segmentation by breaking down the complex soft decoding process into manageable components: first computing LLR values from the received signal and channel statistics, then feeding these LLR values to the LDPC decoder. This segmentation allows the system to implement soft decoding in a practical manner by separating the soft information generation from the decoding process itself, reducing the apparent complexity while maintaining the benefits of soft decoding.
4Reliability
If LDPC decoding is used to reduce errors, then data reliability improves, but the system requires soft values which are not naturally provided by flash memory channels
Solution Approach 1:
The patent introduces an intermediary component that generates soft values (LLR) from the hard output of the flash memory channel. This intermediary layer computes the Log-Likelihood Ratios based on the received voltage levels and channel statistics, then provides these soft values to the LDPC decoder. This intermediary mechanism bridges the gap between the hard-output flash memory interface and the soft-input LDPC decoder, enabling error correction without requiring fundamental changes to the flash memory hardware.
Data Source
AI summary
Embodiments include systems and methods for soft encoding and decoding of data for flash memories using Log-Likelihood Ratios (LLRs). The LLRs are computed from statistics determined by observation of flash memory over time. In some embodiments, the write, retention and read transition probabilities are computed based on the observed statistics. These probabilities are used to compute the LLRs. During a read operation, a device reads the voltage of a cell of the flash memory. The level of the output is determined from the voltage. The level determines which LLRs to compute and transmit to a soft decoder.