360-Bit LDPC Group Interleaving for Robust Data Transmission

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Solution Overview

Problem

Current data transmission using LDPC codes faces challenges in securing excellent communication quality, particularly in maintaining error correction capabilities and avoiding error floor phenomena in decoding characteristics.

Innovation Solution

The implementation of a data processing device and method that performs LDPC encoding based on a parity check matrix with specific encoding rates and group-wise interleaving, followed by mapping to signal points in a modulation scheme, to enhance communication quality by optimizing bit group sequences and parity check matrix structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If LDPC encoding is performed with increased code length to approach Shannon limit, then error correction capability is improved, but system complexity and processing overhead increase

Engineering Contradiction:
Improveerror correction capabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the 16200-bit LDPC code into multiple bit groups of 360 bits each (16200/360 = 45 groups). This segmentation allows for group-wise interleaving operations that improve error correction performance while keeping the processing units manageable and avoiding excessive system complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent specifies precise parameters for the parity check matrix including the information matrix portion represented by a parity check matrix initial value table with specific 1-element positions indicated for every 360 columns. These parameter optimizations enable the system to achieve near-Shannon limit performance with controlled complexity.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If group-wise interleaving is applied to optimize bit group sequences, then communication quality is improved, but processing time and computational load increase

Engineering Contradiction:
Improvecommunication qualityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies group-wise interleaving in advance during the encoding process, reordering bit groups according to a predetermined sequence (0-44 interleaved into specific positions) before transmission. This preliminary action ensures optimal error correction performance is already built into the transmitted signal structure, avoiding the need for complex real-time processing at the receiver.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

By dividing the code into 360-bit groups and applying interleaving operations on these segments rather than on individual bits or the entire block, the patent reduces the computational complexity and processing time while maintaining the error correction benefits of interleaving.

Inventive Principle:
Principle #1Segmentation

3Reliability

If parity check matrix structure is optimized with specific initial value tables, then decoding performance is improved, but memory requirements and initialization complexity increase

Engineering Contradiction:
Improvedecoding performanceVSAvoidmemory requirements
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent optimizes the parity check matrix by specifying precise parameter configurations, including the information matrix portion represented by a parity check matrix initial value table with 1-element positions indicated for every 360 columns. This parameter optimization achieves superior decoding performance while managing memory requirements through efficient representation.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The use of an initial value table allows the parity check matrix structure to be efficiently represented and reproduced. Instead of storing the complete large-scale parity check matrix, the system stores a compact initial value table that defines the 1-element positions, enabling memory-efficient initialization and reproduction of the matrix structure.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10333550B2Data processing device and data processing method
Publication Date: 2019.06.25 SATURN LICENSING LLC
  • US10333550B2 patent drawing
  • US10333550B2 patent drawing
  • US10333550B2 patent drawing

AI summary

The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 6/15, 8/15, or 10/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.