LDPC Group Interleaving for Noise-Robust Modulation Mapping

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Solution Overview

Problem

In communication and broadcasting systems, high digital communication systems face challenges due to noise, fading, and inter-symbol interference, which affect data throughput and reliability, particularly in next-generation mobile communication and digital broadcasting. The performance of Low Density Parity Check (LDPC) codes is influenced by how codeword bits are mapped onto high-order modulation bits, necessitating an effective method for bit mapping to achieve good performance.

Innovation Solution

A transmitting apparatus and method that includes an encoder for generating LDPC codewords, an interleaver to divide the codewords into bit groups, and a modulator to map these bits onto modulation symbols using a block interleaver. The interleaver divides columns into first and second parts based on the number of columns and bit groups, optimizing bit mapping for improved performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If LDPC codeword bits are mapped onto high order modulation bits, then data throughput is improved, but performance deteriorates due to noise and inter-symbol interference

Engineering Contradiction:
Improvedata throughputVSAvoidcommunication reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The LDPC codeword is divided into multiple bit groups, and each bit group is further segmented into sub-bit groups. This segmentation allows selective mapping of different bit groups to different modulation symbol positions, optimizing the distribution of important and less important bits to mitigate noise and interference effects while maintaining high data throughput.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different bit groups within the LDPC codeword are assigned different mapping positions based on their importance. Critical bits are mapped to more robust positions in the modulation symbol, while less critical bits are mapped to positions that can tolerate higher noise levels. This local quality differentiation improves overall communication reliability without sacrificing throughput.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If conventional bit mapping is used for high order modulation, then implementation is simple, but performance is insufficient due to noise and fading

Engineering Contradiction:
Improveimplementation simplicityVSAvoidcommunication performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The bit grouping and sub-bit group segmentation are performed in advance before modulation. The interleaver pre-arranges the bit groups into optimal mapping positions based on their importance and the characteristics of high order modulation. This preliminary action simplifies the actual mapping process during transmission while achieving improved performance through optimized bit distribution.

Inventive Principle:
Principle #10Preliminary action

3Speed

If bit groups are interleaved without dividing columns into parts, then processing is faster, but mapping performance is suboptimal

Engineering Contradiction:
Improveinterleaving speedVSAvoidbit mapping performance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The columns of the block interleaver are divided into first and second parts, allowing different interleaving strategies to be applied to different column segments. This segmentation enables optimized mapping for both speed and performance: the first part can use straightforward interleaving for speed, while the second part can use more complex but performance-optimizing patterns.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different column parts of the interleaver are assigned different interleaving depths and patterns based on the importance of the bit groups they contain. Columns containing more critical bits use interleaving patterns that provide better protection against noise and fading, while columns with less critical bits use simpler, faster processing patterns.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10848181B2Transmitting apparatus and signal processing method thereof
Publication Date: 2020.11.24 SAMSUNG ELECTRONICS CO LTD
  • US10848181B2 patent drawing
  • US10848181B2 patent drawing
  • US10848181B2 patent drawing

AI summary

A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method.