LDPC Codeword Group Mapping for Noise-Resistant Modulation
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Solution Overview
Problem
Current communication systems face challenges in overcoming noise, fading, and inter-symbol interference, particularly in high data throughput applications like next-generation mobile communication and digital broadcasting, where existing error-correction codes are inefficient due to complexity and performance limitations.
Innovation Solution
A transmitting apparatus and method that employs a Low Density Parity Check (LDPC) code encoding, interleaving, and modulation to effectively map LDPC codeword bits onto modulation symbols, utilizing a block interleaver to improve bit grouping and modulation order alignment, enhancing data transmission reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing error-correction codes are used in high data throughput applications, then data transmission can be achieved, but performance deteriorates due to noise, fading, and inter-symbol interference
Solution Approach 1:
The patent segments the LDPC codeword into multiple bit groups and applies different mapping strategies to different segments. Specifically, the codeword is divided into information bit groups and parity bit groups, with different interleaving and mapping approaches applied to each segment, allowing optimized handling of each portion to improve overall reliability against noise and interference
Solution Approach 2:
The patent changes the mapping parameters by introducing a specific mapping rule where bits within each group are mapped to contiguous modulation symbols. The mapping parameter θ is defined based on the group index and bit position, creating a systematic parameter change strategy that optimizes performance against fading and interference while maintaining compatibility with high-order modulation schemes
2Productivity
If LDPC code is transmitted by using a high order modulation scheme, then data throughput is improved, but performance depends on how codeword bits are mapped onto modulation bits
Solution Approach 1:
The patent applies preliminary interleaving and grouping actions before the actual modulation mapping process. By pre-organizing the LDPC codeword into structured bit groups and applying interleaving permutations in advance, the system prepares the bit sequence to be optimally suited for high-order modulation, ensuring that the subsequent mapping process achieves both high throughput and reliability
Solution Approach 2:
The patent systematically changes mapping parameters based on the modulation order and codeword structure. The mapping rule uses parameters derived from the group index, bit position within group, and modulation order to determine the target modulation symbol index. This parameter-based mapping approach adapts to different high-order modulation schemes while maintaining optimal performance
3Reliability
If LDPC encoding is applied to overcome noise and fading, then error correction capability is improved, but system complexity increases
Solution Approach 1:
The patent segments the complex LDPC encoding and mapping process into manageable stages: encoding, grouping, interleaving, and mapping. Each stage operates on structured data with defined parameters, reducing the computational complexity compared to handling the entire codeword as a single block. The segmentation allows for efficient implementation of each function while maintaining overall error correction capability
Solution Approach 2:
The patent uses parameter-based definitions for grouping and mapping that can be systematically computed rather than requiring complex lookup tables or iterative processes. The group size, interleaving pattern, and mapping indices are all defined by mathematical relationships involving the codeword length, group count, and modulation order, enabling efficient implementation with reduced complexity
Data Source
AI summary
A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method.