LDPC Group Interleaving for High-Order Modulation Mapping

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Solution Overview

Problem

In communication and broadcasting systems, high digital communication systems face challenges due to noise, fading, and inter-symbol interference, which affect data throughput and reliability, particularly in next-generation mobile communication and digital broadcasting. The performance of Low Density Parity Check (LDPC) codes depends on how codeword bits are mapped onto high-order modulation bits, requiring an effective method for bit mapping to achieve good performance.

Innovation Solution

A transmitting apparatus and method that includes an encoder for generating LDPC codewords, an interleaver for dividing the codewords into bit groups, and a modulator to map these bits onto modulation symbols using a block interleaver. The interleaver divides columns into first and second parts based on the number of columns and bit groups, optimizing bit mapping for improved performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If LDPC codeword bits are mapped onto high order modulation bits using conventional methods, then the system can achieve basic data transmission, but the performance and reliability deteriorate due to noise, fading, and inter-symbol interference

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidnoise and interference
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The LDPC codeword is divided into multiple bit groups, and each bit group is separately mapped to modulation symbols. This segmentation allows for more flexible and optimized mapping strategies that can better handle noise and interference in different parts of the signal, thereby improving overall communication reliability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different bit groups within the LDPC codeword are mapped to different modulation symbols with varying characteristics. This local quality approach ensures that critical bits are mapped to more robust symbol positions while less critical bits are mapped to positions that can tolerate higher error rates, optimizing performance in noisy environments

Inventive Principle:
Principle #3Local quality

2Productivity

If high order modulation schemes are used to increase data throughput, then productivity improves, but the system becomes more susceptible to noise, fading, and inter-symbol interference

Engineering Contradiction:
Improvedata throughputVSAvoidcommunication reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent employs variable mapping strategies where the mapping parameters are adjusted based on the modulation order and channel conditions. For high order modulation schemes, the bit grouping and mapping parameters are optimized to maintain reliability while achieving high data throughput, effectively balancing productivity and reliability

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the LDPC code structure is optimized for better performance, then reliability improves, but the device complexity increases due to the need for sophisticated interleaving and mapping mechanisms

Engineering Contradiction:
ImproveLDPC code performanceVSAvoidinterleaver and modulator complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The complex LDPC code structure is broken down into manageable bit groups that can be processed independently through the interleaver and modulator. This segmentation reduces the instantaneous processing complexity while maintaining the overall performance benefits of the optimized LDPC code structure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interleaver performs preliminary reorganization of the LDPC codeword bits into optimized groups before modulation. This preliminary action simplifies the subsequent mapping process and reduces the complexity of the modulator, while still achieving the reliability improvements from optimized code structure

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11356117B2Transmitting apparatus and signal processing method thereof
Publication Date: 2022.06.07 SAMSUNG ELECTRONICS CO LTD
  • US11356117B2 patent drawing
  • US11356117B2 patent drawing
  • US11356117B2 patent drawing

AI summary

A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method.