LDPC Group-Wise Interleaving for High-Rate Data Transmission

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Solution Overview

Problem

Current data transmission using LDPC codes faces challenges in maintaining high communication quality, particularly in ensuring error-free transmission and avoiding the error floor phenomenon associated with turbo codes.

Innovation Solution

A data processing device and method that performs LDPC coding with a code length of 64800 bits and a coding rate of 13/15, incorporating group-wise interleaving and mapping to specific signal points, which interleave and deinterleave bit groups to enhance transmission reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If LDPC coding with code length of 64800 bits and coding rate of 13/15 is used, then error correction capability is improved, but device complexity increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidcoding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The 64800-bit LDPC code is divided into 180 bit groups of 360 bits each. Group-wise interleaving is applied to these bit groups, where the sequence of bit groups is permuted according to a specific pattern (even positions first, then odd positions). This segmentation approach maintains the strong error correction capability of the full-rate LDPC code while reducing implementation complexity by enabling parallel processing of smaller bit groups.

Inventive Principle:
Principle #1Segmentation

2Reliability

If group-wise interleaving is applied to bit groups of 360 bits, then transmission reliability is improved, but processing time increases

Engineering Contradiction:
Improvetransmission reliabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The bit groups are pre-organized into a specific sequence pattern before transmission. The group-wise interleaving pattern (0, 2, 4, ..., 178, 1, 3, 5, ..., 179) is predetermined and stored as a lookup table. During encoding, bits are simply routed according to this pre-calculated pattern, avoiding complex real-time calculations and reducing processing time while maintaining transmission reliability.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If mapping to signal points is performed in units of 2 bits, then modulation efficiency is improved, but error susceptibility increases

Engineering Contradiction:
Improvemodulation efficiencyVSAvoiderror susceptibility
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Different bit groups are mapped to different signal point positions in the constellation diagram based on their group index. Bits from even-positioned groups are mapped to in-phase components while bits from odd-positioned groups are mapped to quadrature components. This local differentiation in mapping strategy optimizes both modulation efficiency and error performance by distributing bits strategically across the signal constellation.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12126359B2Data processing device and data processing method
Publication Date: 2024.10.22 SATURN LICENSING LLC
  • US12126359B2 patent drawing
  • US12126359B2 patent drawing
  • US12126359B2 patent drawing

AI summary

The present technology relates to a data processing device and a data processing method which can ensure high communication quality in data transmission using LDPC codes, in group-wise interleaving, an LDPC code having a code length N of 64800 bits and a coding rate r of 13/15 is interleaved in a unit of a bit group of 360 bit. In group-wise deinterleaving, a sequence of bit groups of the LDPC code which has been subjected to the group-wise interleaving is returned to an original sequence, the present technology can be applied to, for example, a case in which data transmission is performed using LDPC codes.