LDPC Interleaving Layout for Bit-Group Mapping in Broadcast Modulation
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Solution Overview
Problem
There is a need for improved decoding and receiving performance in digital broadcasting services, particularly in high-quality digital television and portable multimedia systems, where existing methods do not adequately support various receiving methods and fail to provide enhanced user services.
Innovation Solution
A transmitting apparatus and method that uses an LDPC codeword encoder, interleaver, and modulator to map bits from a predetermined bit group onto a modulation symbol, employing a parity interleaver, group interleaver, and block interleaver to optimize bit arrangement and transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional transmission methods are used, then device complexity is low, but decoding and receiving performance is insufficient
Solution Approach 1:
The interleaver is divided into three independent sub-interleavers: a parity interleaver that processes parity bits, a group interleaver that rearranges bit groups, and a block interleaver that performs block-wise interleaving. This segmentation allows each component to be optimized independently while collectively improving decoding performance without overwhelming complexity
Solution Approach 2:
The patent employs different interleaving strategies for different parts of the LDPC codeword (information bits versus parity bits) and adjusts interleaving parameters based on code rate and modulation scheme. This dynamic adaptation optimizes performance across varying operational conditions without requiring a completely different system for each scenario
2Reliability
If bit groups are rearranged and interleaved, then decoding performance is improved, but processing time increases
Solution Approach 1:
The patent performs preliminary interleaving of bit groups and parity bits before modulation and transmission. By pre-arranging the bit structure according to the specific interleaving pattern, the system prepares the data for optimal decoding performance in advance, reducing the computational burden and time required during actual decoding operations
Solution Approach 2:
The multi-stage interleaving process breaks down the complex interleaving operation into smaller, more manageable steps that can be executed efficiently. The parity interleaver, group interleaver, and block interleaver each perform specific functions in sequence, allowing for optimized processing at each stage rather than attempting a single complex interleaving operation
Data Source
AI summary
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.