LDPC Bit Interleaving Layout for Burst-Error-Resistant 64QAM
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Solution Overview
Problem
Existing data transmission methods using LDPC codes face challenges in maintaining good communication quality due to errors and erasures, particularly in burst error environments, which affect decoding performance and increase power consumption.
Innovation Solution
The implementation of a transmission method that includes parity interleaving and block interleaving of LDPC codes, ensuring that parity bits are interleaved and distributed to prevent simultaneous errors at check nodes, thereby improving resistance to burst errors and maintaining decoding performance in additive white Gaussian noise (AWGN) channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If parity bits are not interleaved, then the transmission structure is simple, but simultaneous errors occur at check nodes during burst errors
Solution Approach 1:
The parity bits are segmented into multiple groups and interleaved with information bits in a structured pattern. This segmentation prevents burst errors from affecting multiple check nodes simultaneously by distributing adjacent parity bits across different positions in the transmitted sequence.
Solution Approach 2:
The interleaving structure acts as an intermediary between the encoder and channel, transforming the raw parity bits into an error-resilient format. This intermediary structure absorbs and distributes the impact of burst errors without allowing them to propagate to multiple check nodes.
2Reliability
If complex interleaving is applied, then resistance to burst errors improves, but power consumption increases
Solution Approach 1:
The interleaving pattern uses carefully selected parameters (such as the relationship between information bit length and parity bit length) to achieve optimal error correction performance. By optimizing these parameters, the system achieves high reliability without requiring excessive computational resources or power consumption.
3Reliability
If parity bits are distributed through interleaving, then simultaneous errors are prevented, but transmission structure becomes complex
Solution Approach 1:
The transmission structure is segmented into information bit segments and parity bit segments that are interleaved in a systematic pattern. This segmentation allows the receiver to process different segments independently while maintaining the ability to correct errors across the entire block.
Solution Approach 2:
The interleaving is performed in advance during encoding, preparing the bit sequence for potential burst errors before transmission. This preliminary arrangement ensures that when errors occur, they are already distributed in a manageable pattern that the decoder can handle efficiently.
Data Source
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AI summary
The present technology relates to a transmission method and a reception device capable of ensuring good communication quality in data transmission by using an LDPC code. In group-wise interleaving, an LDPC code with a code length N of 69120 bits is interleaved in units of bit groups of 360 bits. In group-wise deinterleaving, an arrangement of the LDPC code after the group-wise interleaving is returned to an original arrangement. The present technology can be applied, for example, to the case of performing data transmission by using an LDPC code or the like.