LDPC Bit Interleaving and Symbol Mapping for Robust Broadcasting
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Solution Overview
Problem
Current digital broadcasting systems face challenges in providing robust encoding and decoding performance for high-quality digital television and multimedia services, particularly in managing LDPC codewords for efficient data transmission.
Innovation Solution
A transmitter apparatus and signal processing method that perform LDPC encoding, interleaving, and modulation symbol mapping, specifically using a parity interleaver, group interleaver, and block interleaver to rearrange LDPC codeword groups based on equations and tables defined for specific LDPC codeword lengths, modulation methods, and code rates, ensuring effective bit mapping onto modulation symbols.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LDPC encoding is performed with standard interleaving methods, then the encoding process is simple, but the decoding and receiving performance is insufficient for high-quality digital television and multimedia services
Solution Approach 1:
The interleaving process is divided into three distinct segments: parity interleaver (reversing bit order within groups), group interleaver (rearranging groups based on equations), and block interleaver (column-wise writing and row-wise reading). This segmentation allows each component to address specific performance aspects while maintaining overall system manageability.
Solution Approach 2:
The patent applies preliminary actions by performing parity interleaving first to reverse bit order within groups, then group interleaving to rearrange groups before final block interleaving. This sequential preliminary processing optimizes the codeword structure in advance for improved receiving performance.
2Reliability
If complex interleaving methods are used to improve decoding performance, then receiving robustness is enhanced, but the processing complexity and computational load increase
Solution Approach 1:
The complex interleaving task is segmented into three manageable functional blocks (parity, group, and block interleavers), each with a specific operation. This reduces processing complexity by allowing each block to be optimized independently while collectively achieving robust receiving performance.
Solution Approach 2:
Different interleaving operations are applied to different parts of the LDPC codeword: bit-level reversal in parity interleaver, group-level rearrangement in group interleaver, and block-level transposition in block interleaver. This localized approach optimizes specific aspects of the codeword structure without uniformly increasing complexity across the entire system.
3Productivity
If standard mapping methods are used for modulation symbols, then the modulation process is straightforward, but the transmission efficiency and quality for high-definition services are insufficient
Solution Approach 1:
The mapping process applies preliminary actions by first completing the three-stage interleaving process to optimize bit arrangement, then performing systematic mapping of interleaved bits to modulation symbols. This preliminary optimization of bit structure before mapping improves transmission efficiency for high-definition services.
Data Source
AI summary
A transmitter apparatus and a receiver apparatus are provided. The transmitter apparatus includes: an encoder configured to generate a low density parity check (LDPC) by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol. The modulator maps a bit included in a predetermined group from among a plurality of groups constituting the LDPC codeword onto a predetermined bit in the modulation symbol.