LDPC Transmission Encoding With Known Bit Rate Adaptation

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Solution Overview

Problem

Current erasure correction codes face challenges in efficiently changing coding rates in response to varying communication quality, leading to increased circuit scales for encoders and decoders, which hinders transmission efficiency and erasure correction capability.

Innovation Solution

The method generates a low-density parity check convolutional code (LDPC-CC) with a coding rate of 1/3 by modifying parity check polynomials and inserting known information to adjust the coding rate, reducing the circuit scales of encoders and decoders.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the Reed-Solomon code block length is increased to improve correction capability, then the erasure correction capability is improved, but the amount of computation and circuit scale increase

Engineering Contradiction:
Improveerasure correction capabilityVSAvoidcircuit scale
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the fundamental parameter of the error correction code from Reed-Solomon to LDPC code, which has different mathematical properties and structure. LDPC codes use sparse parity-check matrices that enable efficient decoding algorithms with lower computational complexity, thus improving correction capability without proportionally increasing circuit scale

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the Reed-Solomon coding mechanism with an LDPC coding mechanism. The LDPC code structure with its sparse matrix representation and iterative decoding process substitutes the traditional polynomial-based Reed-Solomon approach, achieving better performance with reduced computational burden

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If multiple erasure correction codes with different coding rates are prepared to adapt to varying communication quality, then the adaptability is improved, but the device complexity increases

Engineering Contradiction:
Improvecoding rate adaptabilityVSAvoidencoder circuit scale
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces dynamic adaptability by enabling the LDPC code to flexibly adjust its coding rate based on communication conditions. Through dynamic control of the number of parity bits generated, the system can adapt to varying channel quality without requiring multiple fixed-rate code structures, thus maintaining low device complexity while achieving high adaptability

Inventive Principle:
Principle #15Dynamics

3Reliability

If the coding rate is reduced to enhance erasure correction capability, then the correction capability is improved, but the transmission efficiency deteriorates

Engineering Contradiction:
Improveerasure correction capabilityVSAvoidtransmission efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent utilizes the flexible parameter structure of LDPC codes to optimize the balance between correction capability and transmission efficiency. By adjusting the parity-check matrix density and coding rate parameters, the system can achieve high error correction performance while maintaining efficient data transmission, avoiding the trade-off that plagues other code structures

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11139837B2Transmission apparatus and method, and reception apparatus and method
Publication Date: 2021.10.05 PANASONIC INTELLECTUAL PROPERTY CORP OF AMERICA
  • US11139837B2 patent drawing
  • US11139837B2 patent drawing
  • US11139837B2 patent drawing

AI summary

A transmission apparatus includes a signal processing circuit configured to obtain information data bits to be transmitted; add known information data bits to the information data bits to generate first data blocks; perform error-correction coding on the first data blocks to generate first coded data blocks including parity data blocks such that the first coded data blocks satisfy a first code rate; remove the known information data bits from the first coded data blocks to generate second coded data blocks, the second coded data blocks satisfying a second code rate different from the first code rate; and modulate the second coded data blocks using a modulation scheme to generate a modulated signal, which is then transmitted. A number of the known information data bits depends on a number of the information data bits such that the first code rate is fixed regardless of the number of the information data bits.