LDPC Layered Decoding Order for Faster 5G Error Correction
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Solution Overview
Problem
In 5G communication systems, high-speed digital communication and broadcasting face challenges due to noise, fading, and inter-symbol interference, which degrade link performance, necessitating improved error-correcting codes for reliable data transmission.
Innovation Solution
The implementation of a low-density parity-check (LDPC) code decoding method using layered scheduling, which involves a receiving device that performs demodulation, identifies input bits, determines a parity check matrix, and applies a predetermined decoding order to efficiently decode LDPC codes, thereby improving decoding performance without increasing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error-correcting codes are used in 5G communication systems, then data transmission can be performed, but link performance deteriorates due to noise, fading, and inter-symbol interference
Solution Approach 1:
The patent applies layered scheduling with specific decoding orders that change the processing parameters of the LDPC decoder. By organizing the parity check matrix into multiple layers and processing them in a predetermined order, the system improves error correction capability against noise and interference without changing the fundamental LDPC code structure
Solution Approach 2:
The parity check matrix is segmented into multiple layers, where each layer corresponds to a specific set of check nodes. This segmentation allows the decoder to process different portions of the code in a structured sequence, improving convergence performance and reliability in the presence of channel impairments
2Reliability
If LDPC decoding is performed to improve error-correcting performance, then reliability increases, but decoding complexity may increase
Solution Approach 1:
The patent implements dynamic layered scheduling where the decoding order and layer processing are adapted based on the specific LDPC code structure and channel conditions. This dynamic approach optimizes the balance between error correction performance and computational complexity by processing only necessary layers in the predetermined order
Solution Approach 2:
By changing the decoding parameters through layered scheduling, the system achieves improved error correction with controlled complexity. The predetermined decoding order optimizes the processing sequence to converge faster with fewer iterations, reducing overall computational complexity while maintaining high reliability
3Productivity
If fast decoding convergence is achieved through improved scheduling, then productivity increases, but device complexity may increase
Solution Approach 1:
The patent establishes a predetermined decoding order for the layers before the actual decoding process begins. This preliminary organization of the parity check matrix into layers with a defined processing sequence enables fast convergence without requiring complex dynamic scheduling decisions during decoding, thus improving productivity with minimal increase in device complexity
Data Source
AI summary
A method may include, and/or a device may be configured for: receiving, from a transmitting device, a signal corresponding to input bits; performing demodulation based on the signal to determine values corresponding to the input bits; identifying a number of the input bits based on the signal; identifying a base matrix and a lifting size based on the number of the input bits; identifying a parity check matrix based on the base matrix; determining a number of layers based on the lifting size and a number of the values; determining an order of layers for low density parity check (LDPC) decoding based on the number of layers; and performing the LDPC decoding to determine the input bits based on the values, the parity check matrix, and the order of layers.