LDPC Decoder LLR Correction Using Neighboring NAND Cell States
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Solution Overview
Problem
The increased bit density in NAND flash memory leads to higher error rates in data decoding, particularly due to the influence of neighboring bits, resulting in inaccurate log likelihood ratios (LLR) used by soft decision Low Density Parity Check (LDPC) decoders, which degrades decoding performance and is time-consuming.
Innovation Solution
A method and controller that utilize a look-up table to calculate and adjust LLR values by determining the charge state of target and neighboring cells, comparing the difference with threshold values, and accounting for the disturbance effect of neighboring cells, thereby providing improved LLR data to LDPC decoders.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple reads are performed to obtain accurate LLR data, then the accuracy of LLR values is improved, but the decoding time increases severely
Solution Approach 1:
The patent pre-calculates and stores LLR values in a look-up table during manufacturing or initialization, rather than calculating them in real-time during decoding. This preliminary action allows the decoder to simply retrieve pre-computed values during operation, dramatically reducing decoding time while maintaining accuracy.
Solution Approach 2:
The patent creates a copy of the charge distribution characteristics and stores it in a look-up table. Instead of performing multiple physical reads to obtain accurate LLR data, the system uses the stored copy of charge distribution patterns to determine LLR values, eliminating the time penalty of repeated reads.
2Quantity of substance
If bit density is increased in NAND flash memory, then storage capacity is improved, but error rates increase due to neighboring bit influence
Solution Approach 1:
The patent applies different LLR values from the look-up table based on the specific charge state and neighboring cell conditions. By tailoring the LLR selection to local conditions (target cell charge state and neighboring cell states), the system compensates for neighboring bit interference and maintains reliability despite high density.
Solution Approach 2:
The patent converts the harmful neighboring bit interference into a useful signal by using the neighboring cell charge states as input parameters to select appropriate LLR values from the look-up table. What was previously a source of errors becomes a factor that enables accurate LLR determination.
3Measurement precision
If multiple reads at varying threshold voltages are performed, then soft information accuracy is improved, but controller performance degrades
Solution Approach 1:
The patent pre-determines the relationship between charge states, neighboring cell conditions, and optimal LLR values during initialization. This preliminary characterization allows the controller to avoid performing multiple reads during actual decoding operations, thereby maintaining high controller performance while still achieving accurate soft information.
Solution Approach 2:
The look-up table serves as an intermediary that stores the results of multiple reads at varying threshold voltages. Instead of performing these reads repeatedly during decoding, the system queries the intermediary table with target cell and neighboring cell states to obtain pre-computed LLR values, thus preserving controller performance.
Data Source
AI summary
A method of providing, by a controller, a log likelihood ratio (LLR) to a low-density parity check (LDPC) decoder, the method comprising storing, in a non-volatile memory controller, a look-up table for storing LLR values of at least one bit representing a charge state of a cell of the plurality of cells in the memory. The controller determines a cell charge state of the target cell, calculates a value representative of the difference in charge states of the target cell and at least one of a plurality of neighboring cells. The controller compares the calculated value with at least one predetermined threshold value, and sets at least one address bit of an address to the look-up table if the calculated value exceeds the at least one threshold value. The controller extracts a new LLR value from the look-up table, and provides the new LLR value to the LDPC decoder.