LDPC Soft Decoding LLR Generation Without Assist Reads
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Solution Overview
Problem
Conventional soft decoding in non-volatile memory devices, such as SSDs, is complex and inefficient due to the need for identifying optimal read threshold voltages and generating log-likelihood ratios (LLRs) using assist reads, which complicates early-stage soft decoding and error correction.
Innovation Solution
A method that uses hard decoding and machine learning, specifically deep neural networks, to generate LLRs from hard read data, checksums, and one's counts without assist reads, allowing for early-stage soft decoding by grouping memory cells into bins based on read threshold voltages and computing parity checksums and one's counts to determine LLRs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional soft decoding using assist reads is used, then sufficient soft information can be obtained for LLR determination, but the process becomes more complex and difficult to implement for early-stage soft decoding
Solution Approach 1:
The patent extracts and utilizes only the necessary information (hard read data, checksums, one's counts) from the hard decoding process to generate LLRs, eliminating the need for additional assist reads. This extraction approach provides sufficient soft information for soft decoding while avoiding the complexity of multiple read operations and threshold voltage optimizations.
Solution Approach 2:
The hard decoding process itself serves the dual purpose of both hard decoding and providing the necessary information for soft decoding. The checksums and one's counts generated during hard decoding are reused to compute LLRs, making the system self-sufficient without requiring external assist reads or additional complex operations.
2Measurement precision
If assist reads are used to generate LLR table for soft decoding, then accurate LLRs can be obtained, but it is difficult to obtain enough information to support early-stage soft decoding
Solution Approach 1:
The patent merges the hard decoding process with the LLR generation process by combining hard read data, checksums, and one's counts into a unified approach. This integration allows the system to obtain sufficient information for accurate LLR computation during early-stage soft decoding without requiring separate assist read operations.
Solution Approach 2:
The hard read operations and information gathering (checksums, one's counts) are performed in advance during the hard decoding phase, preparing all necessary data before soft decoding begins. This preliminary action ensures that sufficient information is available for accurate LLR computation when soft decoding starts, eliminating the need for later assist reads.
3Reliability
If multiple hard reads and re-reads are performed, then hard decoding success rate improves, but the time and resources required increase
Solution Approach 1:
The patent implements feedback by using the results of hard reads (checksums, one's counts, read data patterns) to determine whether to proceed to soft decoding. This feedback mechanism allows the system to efficiently evaluate hard decoding success and transition to soft decoding when appropriate, avoiding unnecessary additional hard reads and reducing overall decoding time.
Data Source
AI summary
A method is provided for determining log-likelihood ratio (LLR) for soft decoding based on information obtained from hard decoding, in a storage system configured to perform hard decoding and soft decoding of low-density parity-check (LDPC) codewords. The method includes performing hard decoding of codewords in a page, the hard decoding including a first hard read and one or more re-reads using predetermined hard read threshold voltages, and grouping memory cells in the page into a plurality of bins based on the read threshold voltages for the first hard read and the one or more re-reads. The method also includes computing parity checksum and one's count for memory cells in each bin, and determining LLR for each bin of memory cells based on read data, checksums, and one's count for each bin.


