LDPC Encoding with Look-Ahead Circuitry for Bubble-Free NAND Transfer
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Solution Overview
Problem
Flash memory devices, particularly NAND flash devices, face challenges in random access data transmission due to serial access limitations, leading to inaccuracies in data transmission that affect overall performance, necessitating improved methods for generating Low-Density Parity-Check (LDPC) codes to enhance data accuracy.
Innovation Solution
An apparatus and method utilizing a LDPC encoder, look-ahead circuitry, and XOR calculation circuitry to perform a 2-stage encoding algorithm with a parity check matrix, dividing the LDPC code into a front and rear part to eliminate timing bubbles in data transmission, allowing simultaneous encoding and transmission without interruptions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a traditional LDPC encoding method is used in NAND flash devices, then the encoding can be completed, but timing bubbles occur during data transmission which reduce transmission efficiency
Solution Approach 1:
The look-ahead circuitry performs preliminary calculations on the rear part of user data using dot product operations with feature rows of the parity check matrix before the main encoding process completes. This allows the encoder to prepare encoding results in advance, eliminating timing bubbles and enabling continuous data transmission without interruptions.
Solution Approach 2:
The user data is divided into a front part and a rear part, with different processing approaches applied to each segment. The front part undergoes traditional LDPC encoding while the rear part is processed by the look-ahead circuitry using simplified dot product operations, allowing parallel processing and eliminating idle time in the encoding pipeline.
2Reliability
If encoding accuracy is improved through traditional methods, then data transmission accuracy improves, but the serial access nature of NAND flash causes transmission delays
Solution Approach 1:
The encoding process is transformed from a sequential operation with idle periods into a continuous pipeline where the look-ahead circuitry continuously performs dot product operations on incoming data while the main encoder processes previous segments. This eliminates gaps in the encoding process and maintains continuous data flow, improving both speed and efficiency while preserving accuracy through the systematic application of LDPC encoding principles.
Data Source
AI summary
The invention relates to an apparatus and a method for generating a Low-Density Parity-Check (LDPC) code. The apparatus includes: a LDPC encoder, a look-ahead circuitry and an exclusive-OR (XOR) calculation circuitry. The LDPC encoder is arranged operably to encode a front part of a user data using a 2-stage encoding algorithm with a parity check matrix to generate a first calculation result. The look-ahead circuitry is arranged operably to perform a dot product operation on a rear part of the user data and one of a plurality of feature rows corresponding to the parity check matrix to generate a second calculation result in each iteration. The XOR calculation circuitry is arranged operably to perform an XOR operation on the first calculation result and the second calculation result to generate a front part of the LDPC code.