LDPC Decoder Message Magnitude Selection for Lower Complexity

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Solution Overview

Problem

Existing LDPC decoding algorithms face challenges in reducing complexity and memory usage while maintaining performance, particularly in iterative decoding processes.

Innovation Solution

The proposed LDPC decoder employs a method of sorting incoming messages by magnitude, selecting a subset with unique magnitudes, and computing outgoing messages using specific functions to generate consistent magnitudes for messages with different inputs, reducing hardware complexity and memory requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the sum-product algorithm is used for iterative decoding, then decoding performance is improved, but hardware complexity and memory usage increase

Engineering Contradiction:
Improvedecoding performanceVSAvoidhardware complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent transforms the sum-product algorithm into the lambda-min algorithm by changing the computational parameters and functions. Instead of using the original sum-product computations, the patent applies a monotonic function transformation to convert messages into lambda values, and uses minimum operations combined with lookup tables to achieve equivalent decoding performance with reduced computational complexity.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates simplified copies of the complex sum-product algorithm through the lambda-min transformation. By copying the essential functionality of message passing and updating while using simpler minimum operations and pre-computed lookup tables instead of complex exponential and logarithmic calculations, the patent reduces hardware complexity while maintaining decoding performance.

Inventive Principle:
Principle #26Copying

2Reliability

If the sum-product algorithm is used for iterative decoding, then decoding performance is improved, but memory usage increases

Engineering Contradiction:
Improvedecoding performanceVSAvoidmemory usage
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent creates simplified copies of the complex sum-product algorithm through the lambda-min transformation. By copying the essential functionality of message passing and updating while using simpler minimum operations and pre-computed lookup tables instead of complex exponential and logarithmic calculations, the patent reduces hardware complexity while maintaining decoding performance.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent performs preliminary computations by pre-calculating and storing values in lookup tables before the actual decoding process. The monotonic functions and their inverses are pre-computed and stored, allowing the decoder to use simple table lookups and minimum operations during iterative decoding, thereby reducing memory requirements during the decoding process itself.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If reduced complexity algorithms like min-sum are used, then hardware complexity is reduced, but decoding performance deteriorates

Engineering Contradiction:
Improvehardware complexityVSAvoiddecoding performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent transforms the sum-product algorithm into the lambda-min algorithm by changing the computational parameters and functions. Instead of using the original sum-product computations, the patent applies a monotonic function transformation to convert messages into lambda values, and uses minimum operations combined with lookup tables to achieve equivalent decoding performance with reduced computational complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8201049B2Low density parity check (LDPC) decoder
Publication Date: 2012.06.12 MONTAGE TECH HLDG CO LTD
  • US8201049B2 patent drawing
  • US8201049B2 patent drawing
  • US8201049B2 patent drawing

AI summary

Methods and apparatuses to perform iterative decoding of Low Density Parity Check (LDPC) codes based on selecting a lambda number of minimum values. In one aspect, an LDPC decoder is configured for: sorting a plurality of incoming messages of a check node according to magnitudes of the incoming messages; identifying a predetermined number of unique message magnitudes from the incoming messages; and computing outgoing messages for a subset of the plurality of incoming message, where the messages of the subset have different magnitudes larger than the predetermined number of unique message magnitudes but the outgoing messages are computed to have the same magnitude. In at least one example, the decoder is further configured for computing outgoing messages that have magnitudes equal to any of the predetermined number of unique message magnitudes. In general, the magnitudes computed for all outgoing messages may not necessarily be the same.