LDPC Parity-Check Matrix Layout for 7/8 Rate Wi‑Fi Codes
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Solution Overview
Problem
The existing LDPC codes in IEEE 802.11REVmc and 802.11ay standards, particularly the 7/8 rate codes, have not been optimized for error rate performance and have different codeword lengths compared to the 802.11ad standard, leading to complexities in encoding and decoding processes.
Innovation Solution
The proposed solution involves generating new LDPC parity check matrices with specific lifting factors and submatrix structures to create 7/8 rate codes that are compatible with the 802.11ad standard, allowing for improved error floor performance and simplified encoding and decoding processes by modifying the existing LDPC matrix structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If new LDPC parity check matrices are generated with specific lifting factors and submatrix structures, then error floor performance is improved and compatibility with 802.11ad standard is achieved, but the complexity of matrix generation and encoding process increases
Solution Approach 1:
The parity check matrix is divided into multiple submatrices with specific structures (e.g., identity submatrices, zero submatrices, and structured submatrices). This segmentation allows for systematic generation of the full matrix while maintaining compatibility with the 802.11ad standard's expected codeword length, thereby improving error floor performance without overwhelming complexity.
Solution Approach 2:
Specific lifting factors (e.g., Z=12, Z=24, Z=48) and submatrix structures are chosen to optimize error floor performance. By carefully selecting these parameters, the patent achieves better reliability while maintaining compatibility with the standard's codeword length requirements, balancing performance improvement with manageable complexity.
2Reliability
If LDPC codes with different codeword lengths are used, then error rate performance can be optimized, but compatibility with 802.11ad standard and implementation of blocking/de-blocking processes becomes complex
Solution Approach 1:
The patent applies different submatrix structures (identity, zero, and structured submatrices) in specific positions within the parity check matrix. This local differentiation allows optimization of error rate performance in critical areas while maintaining overall compatibility with the 802.11ad standard's codeword length requirements for blocking and de-blocking processes.
Solution Approach 2:
The patent supports multiple lifting factors (Z=12, Z=24, Z=48) that can be dynamically selected based on the desired code rate and performance requirements. This dynamic parameter selection enables optimization of error rate performance while maintaining adaptability to the 802.11ad standard through appropriate choice of lifting factor to achieve compatible codeword lengths.
Data Source
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AI summary
Methods and devices are disclosed for encoding source words and decoding codewords with LDPC matrices. The Methods and devices use a LDPC matrix Hn of lifting factor Z. The LDPC matrix Hn comprises a plurality of submatrices, each submatrix having a size of Z x Z, and at least one submatrix has m1 diagonals of "1". m1 is an integer ＞＝2.