LDPC Parity-Check Matrix Interleaving for Burst-Error Decoding
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Solution Overview
Problem
In data transmission using LDPC codes, existing technologies face challenges in securing favorable communication quality due to issues with burst errors and erasures, particularly in AWGN communication paths, which affect the accuracy of decoding and increase power consumption.
Innovation Solution
The implementation of a transmission system that includes LDPC encoding, bit and parity interleaving, and decoding methods, specifically using a parity check matrix with a step structure and cyclic interleaving to improve resistance to burst errors and maintain performance in AWGN channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional LDPC encoding and decoding methods are used, then the system achieves basic error correction capability, but the resistance to burst errors and erasures is insufficient, leading to poor decoding accuracy in AWGN communication paths
Solution Approach 1:
The parity check matrix is segmented into an information matrix and a parity matrix, with the parity matrix further divided into multiple sub-matrices. This segmentation allows for structured interleaving patterns that specifically address burst error characteristics while maintaining overall code performance.
Solution Approach 2:
Bit interleaving and parity interleaving are performed before transmission to preemptively disperse burst errors across different code positions. The interleaving patterns are designed in advance based on the parity check matrix structure, ensuring that errors occurring during transmission are distributed in a manner favorable for decoding.
2Reliability
If conventional LDPC decoding is used, then the basic decoding function is performed, but power consumption increases due to insufficient error resistance requiring multiple decoding attempts
Solution Approach 1:
Interleving is performed in advance to prepare the code structure for optimal error handling. By pre-arranging the bit and parity positions according to the interleving pattern, the system reduces the likelihood of decoding failures that would require retransmission or iterative decoding, thereby reducing power consumption.
Solution Approach 2:
The system changes the structural parameters of the LDPC code by using a specific parity check matrix with defined information and parity matrices, along with specific interleving patterns. These parameter changes optimize the code for burst error resistance, improving first-attempt decoding success rates and reducing the energy required for error correction.
3Reliability
If standard LDPC codes are used, then the code provides basic error correction, but communication quality deteriorates in the presence of burst errors and erasures
Solution Approach 1:
The interleving process converts the harmful concentrated burst errors into dispersed random-like errors by redistributing error positions across the code structure. The parity check matrix structure with separate information and parity matrices is designed to exploit this dispersion, transforming what would be catastrophic burst errors into correctable isolated errors.
Solution Approach 2:
The code is segmented into information bits and parity bits with distinct matrix representations, allowing differential treatment during encoding and decoding. The parity portion is further segmented into sub-matrices that can be independently processed, enhancing the system's ability to recover from various error patterns including bursts and erasures.
Data Source
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AI summary
The present technology relates to a transmission device, a transmission method, a reception device, and a reception method for securing good communication quality in data transmission using an LDPC code. The LDPC coding is performed on the basis of the parity check matrix of the LDPC code with the code length N of 17280 bits and the coding rate r of 7/16 or 8/16. The LDPC code includes information bits and parity bits, and the parity check matrix includes an information matrix portion corresponding to the information bits and a parity matrix portion corresponding to the parity bits. The information matrix portion is represented by a parity check matrix initial value table, and the parity check matrix initial value table is a table representing positions of elements of 1 of the information matrix for every 360 columns. The present technology can be applied to, for example, data transmission using an LDPC code.