LDPC Decoding Matrix Layout for Uniform Error Correction Timing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing error correction techniques using spatially-coupled low density parity check codes face challenges in implementing efficient error correction due to varying column weights in parity check matrices, leading to processing time shifts and circuit complexity.
Innovation Solution
A transmission apparatus employing a spatially-coupled low density parity check code with element matrices arranged stepwise in a diagonal direction, ensuring consistent column weights across matrices to facilitate uniform processing speeds and simplify error correction circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a parity check matrix with large column weight in the column direction of element matrix corresponding to the end of bit string is used to improve error correction characteristics, then error correction characteristics are improved, but processing time shifts occur and circuit implementation becomes complex
Solution Approach 1:
The patent applies local quality by differentiating the structure of element matrices at different positions in the parity check matrix. Specifically, element matrices corresponding to the end portions of the bit string are designed with larger column weights compared to those in the middle portions. This localized structural differentiation improves error correction characteristics at critical positions while maintaining uniform processing time across all decoding operations, thereby resolving the contradiction between reliability improvement and circuit implementation complexity.
2Reliability
If element matrices with different numbers of rows and columns are used to achieve varying column weights, then error correction characteristics are improved, but processing time uniformity deteriorates
Solution Approach 1:
The patent employs parameter changes by modifying the column weight parameter of element matrices at different positions in the parity check matrix. Element matrices corresponding to end portions of the bit string are configured with larger column weights, while those in middle portions maintain smaller column weights. This parameter differentiation enhances error correction performance at critical positions while the overall matrix structure is designed to maintain uniform processing time across all decoding operations, thus resolving the contradiction between reliability improvement and processing time uniformity.
Data Source
AI summary
A transmission apparatus includes, a receiving circuit that receives a reception signal indicating a coded bit string, a decoding circuit that decodes and corrects the bit string by using a spatially-coupled low density parity check code constituted by arranging element matrixes stepwise in a diagonal direction, a parity check matrix of the spatially-coupled low density parity check code including at least one element matrix having at least one of a number of rows and a number of columns different from a number of rows and a number of columns of other element matrixes when each sparse matrix constituting the parity check matrix is regarded as an element matrix, and outputs the corrected bit string.