Rate 3/4 LDPC Matrix Layout for High-Rate 802.11n Error Correction
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Solution Overview
Problem
Low Density Parity Check (LDPC) codes are complex to encode and decode, require large storage for effective implementation, and pose challenges in supporting high data rates, especially with the advent of new wireless standards like 802.11n, which demands simpler and more efficient error correction techniques.
Innovation Solution
A method and system for error correction using a rate ¾ LDPC code with a parity check matrix that employs right-circularly-shifted identity and zero submatrices, enabling efficient encoding and decoding, specifically designed for the 802.11n standard but adaptable to other communication systems, reducing complexity and storage requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional LDPC encoding techniques are used, then error correction capability is improved, but device complexity increases
Solution Approach 1:
The parity check matrix is divided into multiple submatrices (information submatrix and parity submatrix), allowing the encoding process to be segmented into manageable operations. This segmentation reduces the complexity of implementing LDPC encoding while maintaining error correction capability.
Solution Approach 2:
The patent employs specific parameter choices for the parity check matrix dimensions and structure (e.g., block lengths of 1944, 1296, or 648 bits) that optimize the balance between error correction performance and encoding complexity. These parameter changes enable practical implementation of LDPC codes.
2Reliability
If LDPC codes with large blocks are used, then error correction performance is improved, but storage requirements increase
Solution Approach 1:
The large parity check matrix is segmented into smaller submatrices that can be stored and processed efficiently. This allows the system to benefit from large-block LDPC performance while reducing the immediate storage burden by processing submatrices sequentially.
Solution Approach 2:
Different submatrices within the parity check matrix have different properties (information vs. parity submatrices), allowing optimized storage and processing strategies for each local region of the matrix based on its specific function and density characteristics.
3Productivity
If higher raw data rates are implemented for 802.11n, then productivity is improved, but error correction challenges increase
Solution Approach 1:
The patent provides multiple parameter sets for different code rates (e.g., 1/2, 2/3, 3/4) and block lengths, allowing the system to select optimal parameters that balance high data rates with adequate error correction capability for the specific communication conditions.
Data Source
AI summary
A method, system, apparatus and computer program product for correcting errors in a signal transmission using a rate ¾ low density parity check (LDPC) code. At least a portion of a received data message is encoded by using a parity check matrix of the LDPC code. The encoded data message is transmitting in a signal transmission over a communication channel to a receiving device in the communication network. After being received, the encoded portion of the data message is decoded using a parity check matrix of the LDPC code to obtain the data message. For example, the encoding and decoding can be performed using a parity check matrix corresponds to a coded block size (N) equal to 1944 for communicating data in compliance with an 802.11n standard.