LDPC Parity-Check Matrix Layout for Mobile Broadcast Error Resistance
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Solution Overview
Problem
LDPC codes used in digital broadcasting for mobile terminals face challenges in reducing circuit scale and power consumption while maintaining error resistance, due to limitations in code length and repetitive decoding, which are not suitable for mobile terminals compared to fixed terminals.
Innovation Solution
A data processing device and method that encodes information bits into LDPC codes with specific parity check matrices, including information and parity matrix parts, represented by initial value tables, to improve error resistance, specifically for mobile terminals with code lengths of 16200 bits and various code rates, such as 4/15, 7/15, 8/15, and decoding schemes to enhance decoding performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If code length and repetitive decoding are increased to improve error resistance, then error correcting capability is improved, but circuit scale and power consumption increase making it unsuitable for mobile terminals
Solution Approach 1:
The parity check matrix is segmented into information matrix part and parity matrix part, with the information matrix part further divided into multiple blocks. This segmentation allows selective processing and reduces the overall circuit complexity while maintaining error correction capability.
Solution Approach 2:
The patent employs dynamic decoding termination criteria where the decoding process can be terminated early when sufficient reliability is achieved, rather than always performing the maximum number of repetitive decodings. This dynamic approach reduces average power consumption and circuit activity.
2Reliability
If code length and repetitive decoding are increased to improve error resistance, then error correcting capability is improved, but power consumption increases making it unsuitable for mobile terminals
Solution Approach 1:
The parity check matrix is pre-structured with specific patterns and properties that enable faster convergence during decoding. The preliminary design of the matrix structure reduces the number of iterative decoding operations needed, thereby reducing power consumption.
Solution Approach 2:
The patent optimizes specific parameters of the parity check matrix including column weights, row weights, and the distribution of information bits to achieve better error correction performance with fewer decoding iterations, thus reducing power consumption.
3Device complexity
If simple parity check matrix structure is used to reduce circuit scale, then device complexity is reduced, but error resistance deteriorates
Solution Approach 1:
Different parts of the parity check matrix have different structures optimized for their specific functions. The information matrix part has a specific structure for efficient encoding, while the parity matrix part has structures optimized for error detection and correction, achieving high reliability without uniform complexity throughout.
Solution Approach 2:
The parity check matrix is constructed as a composite structure combining multiple sub-matrices with different properties. This composite structure leverages the strengths of each sub-matrix to achieve high error resistance while keeping the overall circuit implementation manageable.
Data Source
AI summary
A data processing device and a data processing method capable of improving resistance to error of data. An LDPC encoder encodes by an LDPC code whose code length is 16200 bits and code rate is 4/15, 7/15, or 8/15. A parity check matrix of the LDPC code is composed by arrangement of an element of an information matrix determined by a parity check matrix initial value table indicating a position of the element of the information matrix corresponding to an information length corresponding to the code length and the code rate for each 360 columns of the parity check matrix with a period of 360 columns in a column direction. The parity check matrix initial value table is for digital broadcasting for a mobile terminal, for example. This technology may be applied to a case in which LDPC encoding and LDPC decoding are performed.