LDPC Check Matrix Layout for Rate Variation and Fewer Short Loops
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Solution Overview
Problem
The practical implementation of spatially-coupled LDPC codes results in degraded error correction performance due to specific configurations of check submatrices, particularly short closed-loop structures, which are generated under cost constraints such as circuit scale limitations.
Innovation Solution
A data structure for the check matrix with rearranged rows for submatrices and a method for varying the coding rate using a puncture circuit and depuncturing unit, where the puncture position minimizes the number of columns affected by puncturing, thereby reducing the occurrence of short closed loops and enhancing error correction performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If spatially-coupled LDPC code is implemented with conventional check matrix configuration, then the code can be constructed with limited circuit scale, but error correction performance degrades due to short closed-loop structures
Solution Approach 1:
The check matrix is divided into multiple check submatrices arranged in a spatially-coupled structure. Each check submatrix corresponds to a specific column group, and by segmenting the matrix into these submatrices, the patent enables independent configuration of each submatrix to avoid short closed-loops while maintaining overall code structure. This segmentation allows the system to achieve good error correction performance without requiring excessive circuit resources.
Solution Approach 2:
The patent applies different configuration strategies to different parts of the check matrix. Specifically, check submatrices in different column groups are configured with different properties (e.g., some with higher column weights, others with lower). This local differentiation allows critical regions to be optimized for error correction while other regions maintain circuit efficiency, resolving the contradiction between performance and manufacturability.
2Reliability
If check submatrices are configured to minimize short closed-loops, then error correction performance improves, but device complexity increases
Solution Approach 1:
The patent introduces a dynamic configuration approach where check submatrices can be selectively enabled or disabled based on operating conditions. The coding rate can be varied by activating different numbers of check submatrices, allowing the system to adapt between performance-optimized mode (more submatrices active) and complexity-reduced mode (fewer submatrices active). This dynamic flexibility resolves the contradiction between performance and complexity.
Solution Approach 2:
The patent changes key parameters of the check matrix configuration, including column weights of check submatrices and the number of active check submatrices. By adjusting these parameters, the system can optimize error correction performance when needed while reducing complexity during normal operation. Specific embodiments use column weights of 3 or 4 for different check submatrices to control closed-loop formation without excessive complexity.
3Device complexity
If coding rate is fixed, then system design is simplified, but adaptability to different communication conditions is reduced
Solution Approach 1:
The patent designs the check matrix structure to serve multiple functions: it can operate at different coding rates by selectively activating different numbers of check submatrices. The same physical hardware structure supports both high-performance mode (lower coding rate with more parity bits) and efficiency mode (higher coding rate with fewer parity bits). This multi-functionality allows the system to adapt to different channel conditions without redesigning the entire system.
Solution Approach 2:
The system enables dynamic switching between different coding rates by controlling which check submatrices are active. The coding rate can be adjusted in real-time based on channel conditions, allowing the system to maintain optimal performance across varying communication environments. This dynamic capability transforms a previously static system into an adaptive one without proportionally increasing complexity.
Data Source
AI summary
A data structure of a check matrix for the error correction code is a data structure of a check matrix for an error correction code, in which the error correction code is the LDPC code, and in which the check matrix has a matrix structure in which rows are rearranged for submatrices consisting of a part of columns of the check matrix. Moreover, in the method and device for varying the coding rate of the error correction code, a puncture position that is determined in accordance with a puncture position determination signal is a puncture position with which a number of columns in which two or more 1s are contained in a region of the check matrix that is directly affected by puncturing is minimized.