LDPC Memory Controller Using Column-Layered Parity Check Decoding
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Solution Overview
Problem
Current error correction systems in memory systems face inefficiencies due to high computational complexity in storing and processing parity check matrices for LDPC codes, which affects the performance of error correction encoding and decoding.
Innovation Solution
The implementation of an error correction circuit and memory controller that perform error correction encoding and decoding using a parity check matrix configured with sub-matrices, specifically utilizing a column-layered scheme where rows are grouped into row groups and cyclic permutation matrices are used to reduce memory requirements and computational complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LDPC coding scheme is used to improve error correction capability, then error correction capability per bit is improved, but computational complexity and memory storage requirements increase
Solution Approach 1:
The parity check matrix is divided into multiple column layers, where each column layer contains a subset of columns. The decoder processes these column layers sequentially rather than all at once, breaking down the complex decoding operation into manageable segments that reduce computational complexity while maintaining error correction capability.
Solution Approach 2:
The system dynamically selects and processes column layers in sequence based on the current decoding state. The check node processor accesses memory areas corresponding to cyclic permutation matrices in the currently selected column layer, updating check node values dynamically as each layer is processed, rather than using a static all-at-once approach.
2Reliability
If code length is increased to improve error correction capability, then error correction capability per bit is improved, but memory storage requirements for parity check matrices increase
Solution Approach 1:
The parity check matrix is segmented into multiple column layers, with each layer containing a portion of the columns. This segmentation allows the memory to store and process only the relevant subset of matrix elements at each decoding step, reducing the amount of memory required compared to storing the entire large-scale parity check matrix simultaneously.
Solution Approach 2:
The system introduces a temporal dimension to the decoding process by processing column layers sequentially over time. This transforms the memory storage requirement from needing to hold all matrix elements simultaneously in space to loading and processing subsets sequentially, effectively trading space for time and reducing memory bandwidth requirements.
3Reliability
If conventional error correction decoding is used, then error correction can be performed, but processing speed and conversion rates are limited due to high computational complexity
Solution Approach 1:
The decoding process is segmented into multiple stages corresponding to different column layers. Each stage processes a subset of check nodes and variable nodes, allowing for parallel processing within each layer and reducing the overall computational burden per stage, thereby improving processing speed while maintaining error correction functionality.
Solution Approach 2:
The system prepares and organizes the parity check matrix into pre-defined column layers with cyclic permutation matrices before decoding begins. This preliminary organization allows the check node processor to efficiently access and update memory areas during decoding without requiring complex real-time matrix manipulation, improving processing speed.
Data Source
AI summary
Disclosed are devices, systems and methods for error correction encoding and decoding. A memory controller includes an error correction encoder for generating a codeword by performing error correction encoding, using a parity check matrix including a plurality of sub-matrices; and an error correction decoder for performing error correction decoding on a read vector corresponding to the codeword on a column layer basis while sequentially selecting column layers of the parity check matrix used for the error correction encoding, in the error correction decoding, the column layer including a set of columns of the parity check matrix. Rows included in the parity check matrix are grouped into a plurality of row groups, and at most one cyclic permutation matrix (CPM) is included for each column layer in each of the row groups.