Dual-LLR LDPC Decoding for Memory Trapping Set Recovery

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Solution Overview

Problem

Current decoding techniques for semiconductor memory devices face challenges in achieving reliable data reading due to variations in sensed programming states, leading to decoding failures and high error rates, particularly in applications requiring strict reliability such as storage systems.

Innovation Solution

An iterative probabilistic decoding technique is implemented, utilizing a dual-decoder system where the first decoder operates with high resolution for initial decoding and switches to a second decoder with lower resolution or modified parameters if the first decoder fails, allowing for continued decoding and error correction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a single high-resolution decoder is used for initial decoding, then decoding precision is improved, but decoding reliability deteriorates when trapping sets are encountered

Engineering Contradiction:
Improvedecoding precisionVSAvoiddecoding reliability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The system dynamically switches between two decoding modes: a high-resolution decoder for normal operation and a low-resolution decoder when trapping sets are detected. This dynamic adaptation allows the system to maintain high decoding precision while ensuring reliability by switching to an alternative decoding approach when problems are encountered.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the resolution parameter of the decoder by switching between high-resolution and low-resolution decoding modes. When trapping sets are detected during high-resolution decoding, the system transitions to low-resolution decoding with modified parameters, thereby resolving the contradiction between precision and reliability.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If iterative probabilistic decoding is used, then error correction capability is improved, but decoding time increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoiddecoding time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs partial iterative decoding by switching from high-resolution to low-resolution decoding when trapping sets are detected. This partial action approach provides sufficient error correction capability for most cases while reducing decoding time when full high-resolution iterative decoding would be too time-consuming.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The decoding process is segmented into two stages: initial high-resolution decoding and subsequent low-resolution decoding. This segmentation allows the system to achieve error correction capability through the first stage while reducing overall decoding time by using the faster low-resolution approach for the second stage when needed.

Inventive Principle:
Principle #1Segmentation

3Productivity

If low-resolution decoding is used, then decoding speed is improved, but decoding accuracy deteriorates

Engineering Contradiction:
Improvedecoding speedVSAvoiddecoding accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The system dynamically selects the appropriate decoding resolution based on the detected error patterns. High-resolution decoding is used for accurate initial decoding, while low-resolution decoding is activated when trapping sets are detected, optimizing the balance between speed and accuracy for different operational conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The high-resolution decoder acts as an intermediary that detects trapping sets and triggers the switch to low-resolution decoding. This intermediary function allows the system to use the faster low-resolution decoding while maintaining overall accuracy through the detection and handling capability provided by the high-resolution stage.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8301979B2Low density parity code (LDPC) decoding for memory with multiple log likelihood ratio (LLR) decoders
Publication Date: 2012.10.30 SANDISK TECHNOLOGIES LLC
  • US8301979B2 patent drawing
  • US8301979B2 patent drawing
  • US8301979B2 patent drawing

AI summary

Data stored in memory is decoded using iterative probabilistic decoding and multiple decoders. A first decoder attempts to decode a representation of a codeword. If the attempt is unsuccessful, a second decoder attempts to decode the representation of a codeword. The second decoder may have a lower resolution than the first decoder. Probability values such as logarithmic likelihood ratio (LLR) values may be clipped in the second decoder. This approach can overcome trapping sets while exhibiting low complexity and high performance. Further, it can be implemented on existing decoders such as those used in current memory devices.