LDPC Mother Matrix Encoding for IR-HARQ Redundancy Scaling
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Solution Overview
Problem
The existing WLAN standards face challenges in increasing redundant bits through retransmissions to decrease channel coding rates, which hinders the decoding performance in IR-HARQ mechanisms.
Innovation Solution
An LDPC code encoding method that utilizes a mother matrix to generate check matrices of different sizes, allowing for varying code rates, enabling the transmission of additional redundant bits during retransmissions to improve decoding success rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the existing WLAN standard coding scheme is used, then the implementation is simple, but the requirement of increasing redundant bits through retransmission in the IR-HARQ mechanism cannot be met
Solution Approach 1:
The mother matrix is designed to serve multiple code rates simultaneously. By configuring different subsets of rows and columns from the same mother matrix, the system can generate check matrices for various code rates (e.g., 1/2, 2/3, 3/4, 5/6), enabling one unified structure to fulfill multiple coding rate requirements without needing separate matrices for each rate.
Solution Approach 2:
The check matrix is made dynamic through selective row and column configuration. The transmit device can dynamically select which rows and columns to include in the check matrix based on the required code rate, allowing the system to adaptively adjust the coding rate during retransmissions to increase redundant bits when needed.
2Reliability
If retransmission is performed to increase redundant bits, then decoding success rate improves, but transmission delay increases
Solution Approach 1:
The mother matrix is pre-configured with all necessary row and column combinations to support multiple code rates. This preliminary preparation allows the transmit device to quickly switch between different code rates during retransmissions without needing to recalculate or regenerate the check matrix structure, thereby reducing processing delay while still enabling incremental redundancy.
3Adaptability or versatility
If multiple check matrices are maintained for different code rates, then code rate adaptability is achieved, but device complexity increases
Solution Approach 1:
Multiple check matrices for different code rates are nested within a single mother matrix structure. Instead of storing separate check matrices for each code rate, the system stores one mother matrix that contains all the necessary information to generate any required check matrix by selecting appropriate rows and columns, significantly reducing storage complexity while maintaining full code rate adaptability.
Data Source
AI summary
A low-density parity-check (LDPC) code encoding method and a communication apparatus are described that provide increased redundant bits through retransmission in an IR-HARQ mechanism, so as to decrease a channel coding rate, and improve decoding performance of an LDPC code. A check matrix of the LDPC code is used as a basic matrix, and the basic matrix is extended to obtain a mother matrix compatible with a plurality of code rates. During LDPC encoding, a transmit device reads, from the mother matrix, a check matrix corresponding to a required code rate, and performs LDPC encoding on an information bit sequence based on the read check matrix. LDPC encoding is performed on the information bit sequence by using check matrices of different sizes, to obtain different quantities of redundant bits.