LDPC Encoding Scheme for Multi-Rate Transmission With Low Complexity

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current LDPC-CC encoders and decoders face challenges in supporting multiple coding rates with low computational complexity while maintaining high received data quality, as existing methods either increase computational complexity or compromise on data quality.

Innovation Solution

The proposed solution involves an LDPC-CC encoder and decoder configuration that uses a parity check polynomial to set coding rates, incorporating a coding rate setting section, computation sections, a parity computing section, and an adding section for encoding, and a log likelihood ratio setting section and computation processing section for decoding, utilizing belief propagation to achieve efficient encoding and decoding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If LDPC-CC encoder and decoder are configured to support multiple coding rates, then coding rate flexibility is improved, but computational complexity increases

Engineering Contradiction:
Improvecoding rate supportVSAvoidcomputational complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The encoder and decoder are designed with a universal structure that can operate at multiple coding rates (1/2, 2/3, 3/4, etc.) by configuring the parity check polynomial parameters. The same hardware/software entity performs encoding and decoding across different coding rates by adjusting the polynomial coefficients and memory length M, eliminating the need for separate dedicated units for each coding rate.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system achieves multiple coding rates by changing parameters of the parity check polynomial (specifically the coefficients a and b in the polynomial expression) and the memory length M, rather than changing the fundamental encoder/decoder architecture. This allows flexible adaptation to different coding rates through parameter configuration while maintaining the same computational structure.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If LDPC-CC encoder and decoder are simplified to reduce computational complexity, then ease of implementation is improved, but received data quality deteriorates

Engineering Contradiction:
Improvecomputational complexityVSAvoidreceived data quality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent demonstrates that by carefully selecting and configuring the parameters of the parity check polynomial (coefficients a and b, and memory length M), the system achieves both low computational complexity and high received data quality. The specific parameter choices optimize the balance between simplicity and performance, allowing the simplified LDPC-CC structure to maintain excellent error correction capability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10855312B2Transmission apparatus and associated method of encoded data
Publication Date: 2020.12.01 PANASONIC HOLDINGS CORP
  • US10855312B2 patent drawing
  • US10855312B2 patent drawing
  • US10855312B2 patent drawing

AI summary

A transmission apparatus includes an encoder that codes a data sequence with a parity check matrix, wherein the data sequence includes a final information bit sequence and virtual information bits, and outputs the final information bit sequence and a parity sequence, as LDPC codes, and a transmitter that transmits the LDPC codes as a transmission data. A column length of the parity check matrix is longer than a total length of the final information bit sequence and the parity sequence, by a length of the virtual information bits that are set to “0” and are not transmitted. The total length of the final information bit sequence and the parity sequence has a sequence length corresponding to a length from a first column to a determined column of the parity check matrix. The encoder generates the LDPC codes by using the first column to the determined column among one or more column(s) of the parity check matrix.